component
2N7002KQ-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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2n7002kq-13: specified limits as data (metadata.characteristics, 31 rows from the datasheet)
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11d ago
2N7002KQ-13
Diodes Incorporated · MOSFETs · SOT-23
2N7002KQ-13 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; ESD protected up to 2kV by an internal gate protection diode, with VGSS rating of ±20 V. |
| 2 | S | passive | Source of the N-channel enhancement mode MOSFET; the body diode is connected between source and drain. |
| 3 | D | passive | Drain of the N-channel MOSFET; VDSS 60 V, continuous drain current 380 mA at VGS = 10 V and TA = +25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS = 0V, ID = 10µA | 3 | ||
| Gate Threshold Voltage | VGS(TH) | 1 | 1.6 | 2.5 | V | VDS = 10V, ID = 1mA | 3 |
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 60V, VGS = 0V | 3 | ||
| Gate-Source Leakage | IGSS | 10 | µA | VGS = ±20V, VDS = 0V | 3 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 1.2 | 2 | Ω | VGS = 10V, ID = 0.5A | 3 | |
| Static Drain-Source On-Resistance | RDS(ON) | 1.4 | 3 | Ω | VGS = 5V, ID = 0.05A | 3 | |
| Forward Transfer Admittance | /Yfs/ | 80 | ms | VDS = 10V, ID = 0.2A | 3 | ||
| Diode Forward Voltage | VSD | 0.75 | 1.1 | V | VGS = 0V, IS = 115mA | 3 | |
| Input Capacitance | Ciss | 30 | 50 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 | |
| Output Capacitance | Coss | 4.2 | 25 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 | |
| Reverse Transfer Capacitance | Crss | 2.9 | 5 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 | |
| Drain-Source Voltage | VDSS | 60 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current (VGS = 10V, steady state) | ID | 380 | mA | VGS = 10V, steady state, TA = +25°C | 2 | ||
| Continuous Drain Current (VGS = 10V, steady state) | ID | 300 | mA | VGS = 10V, steady state, TA = +70°C | 2 | ||
| Continuous Drain Current (VGS = 10V, t<5s) | ID | 430 | mA | VGS = 10V, t<5s, TA = +25°C | 2 | ||
| Continuous Drain Current (VGS = 10V, t<5s) | ID | 340 | mA | VGS = 10V, t<5s, TA = +70°C | 2 | ||
| Continuous Drain Current (VGS = 5V, steady state) | ID | 310 | mA | VGS = 5V, steady state, TA = +25°C | 2 | ||
| Continuous Drain Current (VGS = 5V, steady state) | ID | 240 | mA | VGS = 5V, steady state, TA = +70°C | 2 | ||
| Continuous Drain Current (VGS = 5V, t<5s) | ID | 350 | mA | VGS = 5V, t<5s, TA = +25°C | 2 | ||
| Continuous Drain Current (VGS = 5V, t<5s) | ID | 270 | mA | VGS = 5V, t<5s, TA = +70°C | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | 0.5 | A | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | 1.2 | A | 10µs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 370 | mW | Note 5: FR-4 PCB, minimum recommended pad layout | 2 | ||
| Total Power Dissipation | PD | 540 | mW | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper, single sided | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | 357 | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient, t<5s | RθJA | 292 | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | 240 | °C/W | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper | 2 | ||
| Thermal Resistance, Junction to Ambient, t<5s | RθJA | 197 | °C/W | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper | 2 | ||
| Thermal Resistance, Junction to Case | RθJC | 91 | °C/W | Note 6 | 2 |
CAD (KiCad official)
- Symbol:
2N7002KQ-13 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
2n7002kq-13-etched.step/2n7002kq-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);2n7002kq-13.step/2n7002kq-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (8 pp, sha256
abd3de14105bce6c, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 2N7002KQ-13
**Diodes Incorporated** · MOSFETs · SOT-23
2N7002KQ-13 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; ESD protected up to 2kV by an internal gate protection diode, with VGSS rating of ±20 V. |
| 2 | S | passive | Source of the N-channel enhancement mode MOSFET; the body diode is connected between source and drain. |
| 3 | D | passive | Drain of the N-channel MOSFET; VDSS 60 V, continuous drain current 380 mA at VGS = 10 V and TA = +25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 60 | | | V | VGS = 0V, ID = 10µA | 3 |
| Gate Threshold Voltage | VGS(TH) | 1 | 1.6 | 2.5 | V | VDS = 10V, ID = 1mA | 3 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 60V, VGS = 0V | 3 |
| Gate-Source Leakage | IGSS | | | 10 | µA | VGS = ±20V, VDS = 0V | 3 |
| Static Drain-Source On-Resistance | RDS(ON) | | 1.2 | 2 | Ω | VGS = 10V, ID = 0.5A | 3 |
| Static Drain-Source On-Resistance | RDS(ON) | | 1.4 | 3 | Ω | VGS = 5V, ID = 0.05A | 3 |
| Forward Transfer Admittance | /Yfs/ | 80 | | | ms | VDS = 10V, ID = 0.2A | 3 |
| Diode Forward Voltage | VSD | | 0.75 | 1.1 | V | VGS = 0V, IS = 115mA | 3 |
| Input Capacitance | Ciss | | 30 | 50 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 |
| Output Capacitance | Coss | | 4.2 | 25 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 |
| Reverse Transfer Capacitance | Crss | | 2.9 | 5 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 |
| Drain-Source Voltage | VDSS | | | 60 | V | | 2 |
| Gate-Source Voltage | VGSS | -20 | | 20 | V | | 2 |
| Continuous Drain Current (VGS = 10V, steady state) | ID | | | 380 | mA | VGS = 10V, steady state, TA = +25°C | 2 |
| Continuous Drain Current (VGS = 10V, steady state) | ID | | | 300 | mA | VGS = 10V, steady state, TA = +70°C | 2 |
| Continuous Drain Current (VGS = 10V, t<5s) | ID | | | 430 | mA | VGS = 10V, t<5s, TA = +25°C | 2 |
| Continuous Drain Current (VGS = 10V, t<5s) | ID | | | 340 | mA | VGS = 10V, t<5s, TA = +70°C | 2 |
| Continuous Drain Current (VGS = 5V, steady state) | ID | | | 310 | mA | VGS = 5V, steady state, TA = +25°C | 2 |
| Continuous Drain Current (VGS = 5V, steady state) | ID | | | 240 | mA | VGS = 5V, steady state, TA = +70°C | 2 |
| Continuous Drain Current (VGS = 5V, t<5s) | ID | | | 350 | mA | VGS = 5V, t<5s, TA = +25°C | 2 |
| Continuous Drain Current (VGS = 5V, t<5s) | ID | | | 270 | mA | VGS = 5V, t<5s, TA = +70°C | 2 |
| Maximum Continuous Body Diode Forward Current | IS | | | 0.5 | A | Note 6 | 2 |
| Pulsed Drain Current | IDM | | | 1.2 | A | 10µs pulse, duty cycle = 1% | 2 |
| Total Power Dissipation | PD | | | 370 | mW | Note 5: FR-4 PCB, minimum recommended pad layout | 2 |
| Total Power Dissipation | PD | | | 540 | mW | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper, single sided | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | | 357 | | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient, t<5s | RθJA | | 292 | | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient, Steady State | RθJA | | 240 | | °C/W | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper | 2 |
| Thermal Resistance, Junction to Ambient, t<5s | RθJA | | 197 | | °C/W | Note 6: 1” x 1” FR-4 PCB, high coverage 2oz. copper | 2 |
| Thermal Resistance, Junction to Case | RθJC | | 91 | | °C/W | Note 6 | 2 |
## CAD (KiCad official)
- Symbol: `2N7002KQ-13`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `2n7002kq-13-etched.step` / `2n7002kq-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2n7002kq-13.step` / `2n7002kq-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912435630133248) (8 pp, sha256 `abd3de14105bce6c`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/2n7002kq-13-datasheet.pdf)