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Contents

README

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2N7002KD

FUXINSEMI · MOSFETs · SOT-363

2N7002KD from FUXINSEMI, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, VDS 60V max, ID 0.34A).
2 G1 input Gate of MOSFET 1 with ESD protection, VGS ±20V max, threshold 1.0 to 2.5V.
3 D2 passive Drain of MOSFET 2, VDS 60V max, ID 0.34A continuous.
4 S2 passive Source of MOSFET 2 (N-channel, VDS 60V max, ID 0.34A).
5 G2 input Gate of MOSFET 2 with ESD protection, VGS ±20V max, threshold 1.0 to 2.5V.
6 D1 passive Drain of MOSFET 1, VDS 60V max, ID 0.34A continuous.

Key specifications

Parameter Value
Manufacturer FUXINSEMI
Package SOT-363
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: 2N7002KD
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: 2n7002kd-etched.step / 2n7002kd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2n7002kd.step / 2n7002kd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FUXINSEMI datasheet (4 pp, sha256 68a174fced84afbd, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF