component
2N7002K-T1-GE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown2N7002K-T1-GE3
Vishay Intertech · MOSFETs · SOT-23
2N7002K-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate input terminal with ±20 V maximum gate-source voltage and gate-threshold voltage range of 1 to 2.5 V. |
| 2 | S | power_in | Source terminal serving as reference node for N-channel MOSFET operation; supports maximum drain-source voltage of 60 V. |
| 3 | D | output | Drain terminal for load current; carries up to 300 mA continuous at TA = 25°C with maximum drain-source voltage of 60 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
2N7002K-T1-GE3 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
2n7002k-t1-ge3-etched.step/2n7002k-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);2n7002k-t1-ge3.step/2n7002k-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
c9653dc9b240d71e, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).