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README

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2N7002H6327

Infineon Technologies · MOSFETs · SOT-23

2N7002H6327 from Infineon Technologies, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate pin; gate-source voltage limited to ±20 V, with a gate threshold of 1.5 V min to 2.5 V max at ID=250 µA.
2 S passive Source pin; continuous drain current is 0.30 A at TA=25 °C and the body diode forward current is 0.3 A max.
3 D passive Drain pin; drain-source voltage rating is 60 V, with RDS(on) max of 3 Ω at VGS=10 V and 4 Ω at VGS=4.5 V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOT-23
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 60 V VGS=0 V, ID=250 µA 2
Gate threshold voltage VGS(th) 1.5 2.1 2.5 V VDS=VGS, ID=250 µA 2
Drain-source leakage current ID(off) 0.1 µA VDS=60 V, VGS=0 V, Tj=25 °C 2
Drain-source leakage current ID(off) 5 µA VDS=60 V, VGS=0 V, Tj=150 °C 2
Gate-source leakage current IGSS 1 10 nA VGS=20 V, VDS=0 V 2
Drain-source on-state resistance RDS(on) 2 4 Ω VGS=4.5 V, ID=0.25 A 2
Drain-source on-state resistance RDS(on) 1.6 3 Ω VGS=10 V, ID=0.5 A 2
Transconductance gfs 0.2 0.36 S /VDS/>2/ID/RDS(on)max, ID=0.24 A 2
Input capacitance Ciss 13 20 pF VGS=0 V, VDS=25 V, f=1 MHz 3
Output capacitance Coss 4.1 6 pF VGS=0 V, VDS=25 V, f=1 MHz 3
Reverse transfer capacitance Crss 2 3 pF VGS=0 V, VDS=25 V, f=1 MHz 3
Turn-on delay time td(on) 3 4.5 ns VDD=30 V, VGS=10 V, ID=0.5 A, RG=6 Ω 3
Rise time tr 3.3 5 ns VDD=30 V, VGS=10 V, ID=0.5 A, RG=6 Ω 3
Turn-off delay time td(off) 5.5 9 ns VDD=30 V, VGS=10 V, ID=0.5 A, RG=6 Ω 3
Fall time tf 3.1 5 ns VDD=30 V, VGS=10 V, ID=0.5 A, RG=6 Ω 3
Gate to source charge Qgs 0.05 0.1 nC VDD=48 V, ID=0.5 A, VGS=0 to 10 V 3
Gate to drain charge Qgd 0.2 0.4 nC VDD=48 V, ID=0.5 A, VGS=0 to 10 V 3
Gate charge total Qg 0.4 0.6 nC VDD=48 V, ID=0.5 A, VGS=0 to 10 V 3
Diode continuous forward current IS 0.3 A TA=25 °C 3
Diode pulse current IS,pulse 1.2 A TA=25 °C 3
Diode forward voltage VSD 0.96 1.2 V VGS=0 V, IF=0.5 A, Tj=25 °C 3
Reverse recovery time trr 8.5 13 ns VR=30 V, IF=0.5 A, diF/dt=100 A/µs 3
Reverse recovery charge Qrr 2.4 4 nC VR=30 V, IF=0.5 A, diF/dt=100 A/µs 3
Thermal resistance, junction - minimal footprint RthJA 250 K/W Performed on a 40x40mm2 FR4 PCB 2
Continuous drain current ID 0.3 A TA=25 °C 1
Continuous drain current ID 0.24 A TA=70 °C 1
Pulsed drain current ID,pulse 1.2 A TA=25 °C 1
Avalanche energy, single pulse EAS 1.3 mJ ID=0.3 A, RGS=25 Ω 1
Reverse diode dv/dt dv/dt 6 kV/µs ID=0.3 A, VDS=48 V, di/dt=200 A/µs, Tj,max=150 °C 1
Gate source voltage VGS -20 20 V 1
Power dissipation Ptot 0.5 W TA=25 °C 1
Operating and storage temperature Tj, Tstg -55 150 °C 1
Gate plateau voltage Vplateau 4 V VDD=48 V, ID=0.5 A, VGS=0 to 10 V 3

CAD (KiCad official)

  • Symbol: 2N7002H6327
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: 2n7002h6327-etched.step / 2n7002h6327-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2n7002h6327.step / 2n7002h6327.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 035a6c7864857896, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF