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2EDN7524G

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Infineon Technologies Gate Drive ICs, WSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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2EDN7524G

Infineon Technologies · Gate Drive ICs · WSON-8-EP(3x3)

2EDN7524G from Infineon Technologies, in a WSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ENA input Enable input for channel A; if ENA is high or left open OUTA is controlled by INA, and ENA low forces OUTA low.
2 INA input Logic input controlling OUTA (non-inverting), LV-TTL compatible with internal pull-down.
3 GND power_in Ground; the exposed pad of the PG-WSON-8-3 package has to be connected to the GND pin.
4 INB input Logic input controlling OUTB (non-inverting), LV-TTL compatible with internal pull-down.
5 OUTB output Driver output channel B, low-impedance output with source and sink capability.
6 VDD power_in Positive supply voltage with operating range 4.5 V to 20 V (absolute maximum 22 V).
7 OUTA output Driver output channel A, low-impedance output with source and sink capability.
8 ENB input Enable input for channel B; if ENB is high or left open OUTB is controlled by INB, and ENB low forces OUTB low.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package WSON-8-EP(3x3)
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Positive supply voltage VVDD -0.3 22 V 13
Voltage at pins INA, INB, ENA, ENB VIN -10 22 V 13
Reverse current peak at pins OUTA, OUTB ISNKREV, ISRCREV -5 5 Apk < 500ns 13
Junction temperature TJ -40 150 °C 13
Storage temperature TS -55 150 °C 13
Supply voltage VVDD 4.5 20 V Min. defined by UVLO 14
Logic input voltage VIN -5 20 V 14
Junction temperature TJ -40 150 °C Continuous operation above 125 °C may reduce life time 14
VDD quiescent current IVDDQU1 0.5 0.7 1.2 mA OUT = high, VVDD= 12 V 15
VDD quiescent current IVDDQU2 0.3 0.48 0.7 mA OUT = low, VVDD= 12 V 15
UVLO turn on threshold UVLOON 3.9 4.2 4.5 V 15
UVLO turn off threshold UVLOOFF 3.6 3.9 4.2 V 15
Input voltage threshold for transition LH VINH 1.98 2.1 2.2 V 15
Input voltage threshold for transition HL VINL 0.95 1.02 1.1 V 15
High Level (Sourcing) Output Resistance RONSRC 0.35 0.7 1.2 Ω ISRC = 50mA 16
Low Level (Sinking) Output Resistance RONSNK 0.28 0.55 1 Ω ISNK = 50mA 16
Input/Enable to output propagation delay LH TPDlh 15 17 23 ns CLOAD= 1.8 nF, VVDD= 12 V; low to high transition at Input/Enable 16
Input/Enable to output propagation delay HL TPDhl 15 19 23 ns CLOAD= 1.8 nF, VVDD= 12 V; high to low transition at Input/Enable 16
Propagation delay mismatch between the two channels delta tPD 2 ns 16
Rise Time TRISE 5.3 10 ns CLOAD= 1.8 nF, VVDD= 12 V 16
Fall Time TFAll 4.5 10 ns CLOAD= 1.8 nF, VVDD= 12 V 16
Minimum input pulse width that changes output state TPW 6 10 ns CLOAD= 1.8 nF, VVDD= 12 V 16
ESD capability CDM VESD 1.5 kV Charged Device Mode (CDM) 13
ESD capability HBM VESD 2.5 kV Human Body Model (HBM) 13
UVLO threshold hysteresis UVLOHYS 0.3 V 15
Input pull up resistor RINH 400 kΩ Inputs with initial high logic level 15
Input pull down resistor RINL 100 kΩ Inputs with initial low logic level 15
High Level (Sourcing) Output Current ISRCPEAK 5 A 16
Low Level (Sinking) Output Current ISNKPEAK -5 A 16
Thermal resistance junction-ambient RthJA25 61 K/W PG-WSON-8-3, Tamb=25°C 14
Thermal resistance junction-case (top) RthJP25 54 K/W PG-WSON-8-3, Tamb=25°C 14
Thermal resistance junction-board RthJB25 52 K/W PG-WSON-8-3, Tamb=25°C 14
Characterization parameter junction-top ΨthJC25 8 K/W PG-WSON-8-3, Tamb=25°C 14
Characterization parameter junction-board ΨthJB25 11 K/W PG-WSON-8-3, Tamb=25°C 14

CAD (KiCad official)

  • Symbol: 2EDN7524G
  • Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • 3D model: WSON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: 2edn7524g-etched.step / 2edn7524g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2edn7524g.step / 2edn7524g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (31 pp, sha256 a22bd5363b44c8ae, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF