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25LC640T-I

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by adom

Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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25LC640T-I

Microchip Tech · EEPROM · SOIC-8

25LC640T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input: a low level selects the device, a high level deselects it and forces Standby mode, with SO going high-impedance; a low-to-high transition after a valid write sequence starts the internal write cycle.
2 SO tri_state Serial Data Output: data is shifted out on this pin after the falling edge of the serial clock, and it is high-impedance when the device is deselected or on hold.
3 WP input Write-Protect pin: when low and the WPEN bit is high, writes to the nonvolatile bits of the STATUS register are disabled; the pin function is blocked when WPEN is low.
4 VSS power_in Ground.
5 SI input Serial Data Input: receives instructions, addresses and data, latched on the rising edge of the serial clock.
6 SCK input Serial Clock input: synchronizes communication, with SI latched on the rising edge and SO updated after the falling edge; max clock 2 MHz for VCC 2.5-5.5V (3 MHz for 4.5-5.5V).
7 HOLD input Hold input: pulling it low (while SCK is low) pauses serial communication without resetting the sequence, and it must be held high whenever the function is not used.
8 VCC power_in Supply voltage: 2.5V to 5.5V for 25LC640 (absolute maximum 7.0V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 7 V 2
Input/output voltage w.r.t. VSS -0.6 V max is VCC + 1.0V 2
Storage temperature -65 150 °C 2
Ambient temperature under bias -65 125 °C 2
ESD protection on all pins 4 kV 2
Supply voltage range VCC 2.5 5.5 V 25LC640 industrial 1
Operating temperature, industrial TA -40 85 °C Industrial (I) 3
High-level input voltage VIH1 2 V VCC ≥ 2.7V (Note 1); max VCC + 1 2
Low-level input voltage VIL1 -0.3 0.8 V VCC ≥ 2.7V (Note 1) 2
Low-level output voltage VOL 0.4 V IOL = 2.1 mA 2
Input leakage current ILI -1 1 μA CS = VCC, VIN = VSS TO VCC 2
Output leakage current ILO -1 1 μA CS = VCC, VOUT = VSS TO VCC 2
Internal capacitance (all inputs and outputs) CINT 7 pF TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note 1) 2
Read operating current ICC 1 mA VCC = 5.5V; FCLK = 3.0 MHz; SO = Open 2
Read operating current ICC 500 μA VCC = 2.5V; FCLK = 2.0 MHz; SO = Open 2
Write current ICC 5 mA VCC = 5.5V 2
Write current ICC 3 mA VCC = 2.5V 2
Standby current ICCS 5 μA CS = VCC = 5.5V, Inputs tied to VCC or VSS 2
Standby current ICCS 1 μA CS = VCC = 2.5V, Inputs tied to VCC or VSS 2
Clock frequency FCLK 3 MHz VCC = 4.5V to 5.5V (Note 2) 3
Clock frequency FCLK 2 MHz VCC = 2.5V to 5.5V 3
CS setup time TCSS 100 ns VCC = 4.5V to 5.5V 3
CS setup time TCSS 250 ns VCC = 2.5V to 5.5V 3
CS hold time TCSH 150 ns VCC = 4.5V to 5.5V 3
CS hold time TCSH 250 ns VCC = 2.5V to 5.5V 3
CS disable time TCSD 500 ns 3
Data setup time TSU 30 ns VCC = 4.5V to 5.5V 3
Data setup time TSU 50 ns VCC = 2.5V to 5.5V 3
Data hold time THD 50 ns VCC = 4.5V to 5.5V 3
Data hold time THD 100 ns VCC = 2.5V to 5.5V 3
CLK rise time TR 2 μs (Note 1) 3
CLK fall time TF 2 μs (Note 1) 3
Clock high time THI 150 ns VCC = 4.5V to 5.5V 3
Clock high time THI 230 ns VCC = 2.5V to 5.5V 3
Clock low time TLO 150 ns VCC = 4.5V to 5.5V 3
Clock low time TLO 230 ns VCC = 2.5V to 5.5V 3
Clock delay time TCLD 50 ns 3
Clock enable time TCLE 50 ns 3
Output valid from clock low TV 150 ns VCC = 4.5V to 5.5V 3
Output valid from clock low TV 230 ns VCC = 2.5V to 5.5V 3
Output hold time THO 0 ns (Note 1) 3
Output disable time TDIS 200 ns VCC = 4.5V to 5.5V (Note 1) 3
Output disable time TDIS 250 ns VCC = 2.5V to 5.5V (Note 1) 3
HOLD setup time THS 100 ns VCC = 4.5V to 5.5V 3
HOLD hold time THH 100 ns VCC = 4.5V to 5.5V 3
HOLD low to output High-Z THZ 100 ns VCC = 4.5V to 5.5V (Note 1) 3
HOLD low to output High-Z THZ 150 ns VCC = 2.5V to 5.5V (Note 1) 3
HOLD high to output valid THV 100 ns VCC = 4.5V to 5.5V 3
HOLD high to output valid THV 150 ns VCC = 2.5V to 5.5V 3
Internal write cycle time TWC 5 ms 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Package P = Plastic DIP (300 mil Body), 8-lead SN = Plastic SOIC (150 mil Body), 8-lead 21

CAD (KiCad official)

  • Symbol: 25LC640T-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25lc640t-i-etched.step / 25lc640t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25lc640t-i.step / 25lc640t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (24 pp, sha256 5aaf2f10a0718a00, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF