25LC640AT-I/SN

{
  "slug": "25lc640at-i-sn",
  "version": "0.2.3",
  "type": "component",
  "description": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "memory",
    "25lc640at-i"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "25lc640at-i.kicad_sym",
    "25lc640at-i.kicad_mod",
    "25lc640at-i.glb",
    "25lc640at-i.step",
    "25lc640at-i-etched.step",
    "25lc640at-i.lbr",
    "docs/hero.png",
    "docs/25lc640at-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pads.json",
    "25lc640at-i-etched.glb",
    "25lc640at-i-st-hero.glb",
    "25lc640at-i-st-hero.overlay.json",
    "25lc640at-i-sn-hero.glb",
    "25lc640at-i-sn-hero.overlay.json"
  ],
  "component": {
    "mpn": "25LC640AT-I/SN",
    "manufacturer": "Microchip",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "EEPROM",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d19737a4e1586621d1f5d1cbc50d5fe1.pdf",
    "parts": {
      "symbol": "25lc640at-i.kicad_sym",
      "footprint": "25lc640at-i.kicad_mod",
      "model_3d": "25lc640at-i-sn-hero.glb",
      "model_3d_plain": "25lc640at-i.glb",
      "model_3d_step": "25lc640at-i-etched.step",
      "model_3d_step_plain": "25lc640at-i.step",
      "lbr": "25lc640at-i.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "CS",
        "type": "input",
        "description": "Active-low Chip Select. Pulling CS low selects the device and enables SPI communication; a low-to-high transition ends the current operation and (for writes) starts the internal write cycle. Must be driven from Vss to Vcc CMOS levels."
      },
      {
        "number": "2",
        "name": "SO",
        "type": "output",
        "description": "Serial Data Output. Shifts out data on the falling edge of SCK, MSB first. High-impedance when CS is high or HOLD is asserted (Voh ≥ Vcc-0.5 V at Ioh = -400 µA; Vol ≤ 0.4 V at Iol = 2.1 mA)."
      },
      {
        "number": "3",
        "name": "WP",
        "type": "input",
        "description": "Active-low Write Protect. When held low with the WPEN bit of the STATUS register set, prevents any writes to the STATUS register (hardware write-protect of block-protect settings). Tie to Vcc if unused."
      },
      {
        "number": "4",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V)."
      },
      {
        "number": "5",
        "name": "SI",
        "type": "input",
        "description": "Serial Data Input. Instruction opcodes, addresses and data are clocked in MSB first on the rising edge of SCK after CS is brought low. CMOS input; Vih1 ≥ 0.7 Vcc."
      },
      {
        "number": "6",
        "name": "SCK",
        "type": "input",
        "description": "Serial Clock input. Provides the timing reference for SI (sampled on rising edge) and SO (updated on falling edge). Supports SPI Mode 0,0 and Mode 1,1. Max 10 MHz at Vcc ≥ 4.5 V, 5 MHz at 2.5 V, 3 MHz at 1.8 V."
      },
      {
        "number": "7",
        "name": "HOLD",
        "type": "input",
        "description": "Active-low Hold input. When asserted with CS low, pauses serial communication so the host MCU can service higher-priority interrupts; SO goes high-impedance and SI/SCK transitions are ignored until HOLD is released. Must be high for normal operation."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage. 25LC640A operating range 2.5 V to 5.5 V (25AA640A variant is 1.8-5.5 V). Absolute max 6.5 V. Typical Icc: 5 mA read/write at 5.5 V, 1 µA standby at 5.5 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/d19737a4e1586621d1f5d1cbc50d5fe1.pdf",
        "pages": 35,
        "sha256": "b26afb22b1cb92d8",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
      "mark": "drawn"
    },
    "models_3d": [
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        "file": "25lc640at-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "25lc640at-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
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        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "366bae752f998738c3f1d5bc3ae6bfca357c147ccdea99a257bbc98b9e29d13c",
        "checked": "2026-11-03",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "family": {
      "base": "25LC640AT-I",
      "siblings": [
        "25LC640AT-I/MNY",
        "25LC640AT-I/ST"
      ],
      "old_slug": "25lc640at-i",
      "note": "identity by the package-code gate against this page's own land and datasheet (correction 2026-11-12)"
    }
  },
  "title": "25LC640AT-I/SN",
  "brief": "Microchip EEPROM, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "metadata": {
    "specs": {
      "Manufacturer": "Microchip",
      "Package": "SOIC-8",
      "Category": "Memory",
      "Pins": "8"
    }
  },
  "discovery_triggers": [
    "25lc640at-i"
  ],
  "discovery_pitch": "25LC640AT-I (Microchip) component page with datasheet-verified CAD.",
  "visibility": "public"
}