component

25LC512T-I

Public Made by Adom

by adom

Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemory25lc512t-ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers 25lc512t-i: viewers · Ray 4d ago
25lc512t-i-etched.glb Publish 0.1.0 · Ray 4d ago
25lc512t-i-etched.step 25lc512t-i: factory component page (tier=lcsc) · Ray 4d ago
25lc512t-i-hero.glb 25lc512t-i: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
25lc512t-i-hero.overlay.json Publish 0.1.0 · Ray 4d ago
25lc512t-i.glb Publish 0.1.0 · Ray 4d ago
25lc512t-i.kicad_mod Publish 0.1.0 · Ray 4d ago
25lc512t-i.kicad_sym Publish 0.1.0 · Ray 4d ago
25lc512t-i.lbr Publish 0.1.0 · Ray 4d ago
25lc512t-i.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago

25LC512T-I

Microchip Tech · EEPROM · SOIC-8

25LC512T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input: a low level selects the device, a high level deselects it and forces Standby mode, and SO goes high-impedance when deselected.
2 SO output Serial Data Output: data is shifted out after the falling edge of SCK during a read cycle, and the pin tri-states when CS is high or HOLD is pulled low.
3 WP input Write-Protect: together with the WPEN bit in the STATUS register, a low level prohibits writes to the nonvolatile STATUS register bits, and the pin is ignored while WPEN is low.
4 VSS power_in Ground reference for the device.
5 SI input Serial Data Input: receives instructions, addresses and data, latched on the rising edge of SCK.
6 SCK input Serial Clock input: synchronizes communication with the master, with SI latched on the rising edge and SO updated after the falling edge.
7 HOLD input Hold input: when pulled low while SCK is low (and the device is selected), serial communication pauses and SO tri-states; it must be held high when the function is not used.
8 VCC power_in Supply voltage, specified for operation from 2.5V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature -65 150 °C 2
Ambient temperature under bias -40 125 °C 2
All inputs and outputs w.r.t. VSS -0.6 V 2
ESD protection on all pins 4 kV 2
VCC supply voltage (DC characteristics) VCC 2.5 5.5 V DC characteristics, Industrial (I) 2
VCC supply voltage (AC characteristics) VCC 2 5.5 V AC characteristics, Industrial (I) 3
Ambient temperature, Industrial (I) TA -40 85 °C Industrial (I) 2
Low-level output voltage VOL 0.4 V IOL = 2.1 mA 2
Input leakage current ILI -1 1 µA CS = VCC, VIN = VSS or VCC 2
Output leakage current ILO -1 1 µA CS = VCC, VOUT = VSS or VCC 2
Internal capacitance (all inputs and outputs) CINT 7 pF TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note) 2
Read operating current ICC 10 mA VCC = 5.5V; FCLK = 20.0 MHz; SO = Open 2
Read operating current ICC 5 mA VCC = 2.5V; FCLK = 10.0 MHz; SO = Open 2
Write operating current ICC 7 mA VCC = 5.5V 2
Write operating current ICC 5 mA VCC = 2.5V 2
Standby current ICCS 10 µA CS = VCC = 5.5V, Inputs tied to VCC or VSS, 85°C 2
Deep power-down current ICCSPD 1 µA CS = VCC = 2.5V, Inputs tied to VCC or VSS, 85°C 2
Clock frequency FCLK 20 MHz 4.5V VCC 5.5V (I) 3
Clock frequency FCLK 10 MHz 2.5V VCC 5.5V (I, E) 3
CS setup time TCSS 25 ns 4.5V VCC 5.5V (I) 3
CS setup time TCSS 50 ns 2.5V VCC 5.5V (I, E) 3
CS hold time TCSH 50 ns 4.5V VCC 5.5V (I) 3
CS hold time TCSH 100 ns 2.5V VCC 5.5V (I, E) 3
CS disable time TCSD 50 ns 3
Data setup time Tsu 5 ns 4.5V VCC 5.5V (I) 3
Data setup time Tsu 10 ns 2.5V VCC 5.5V (I, E) 3
Data hold time THD 10 ns 4.5V VCC 5.5V (I) 3
Data hold time THD 20 ns 2.5V VCC 5.5V (I, E) 3
CLK rise time TR 20 ns (Note 1) 3
CLK fall time TF 20 ns (Note 1) 3
Clock high time THI 25 ns 4.5V VCC 5.5V (I) 3
Clock high time THI 50 ns 2.5V VCC 5.5V (I, E) 3
Clock low time TLO 25 ns 4.5V VCC 5.5V (I) 3
Clock low time TLO 50 ns 2.5V VCC 5.5V (I, E) 3
Clock delay time TCLD 50 ns 3
Clock enable time TCLE 50 ns 3
Output valid from clock low TV 25 ns 4.5V VCC 5.5V (I) 3
Output valid from clock low TV 50 ns 2.5V VCC 5.5V (I, E) 3
Output hold time THO 0 ns (Note 1) 3
Output disable time TDIS 25 ns 4.5V VCC 5.5V (I) 3
Output disable time TDIS 50 ns 2.5V VCC 5.5V (I, E) 3
HOLD setup time THS 10 ns 4.5V VCC 5.5V (I) 3
HOLD setup time THS 20 ns 2.5V VCC 5.5V (I, E) 3
HOLD hold time THH 10 ns 4.5V VCC 5.5V (I) 3
HOLD hold time THH 20 ns 2.5V VCC 5.5V (I, E) 3
HOLD low to output High-Z THZ 15 ns 4.5V VCC 5.5V (I) (Note 1) 3
HOLD low to output High-Z THZ 30 ns 2.5V VCC 5.5V (I, E) (Note 1) 3
HOLD high to output valid THV 15 ns 4.5V VCC 5.5V (I) 3
HOLD high to output valid THV 30 ns 2.5V VCC 5.5V (I, E) 3
CS high to Standby mode TREL 100 µs 3
CS high to Deep power-down TPD 100 µs 3
Chip erase cycle time TCE 10 ms 3
Sector erase cycle time TSE 10 ms 3
Internal write cycle time TWC 5 ms Byte or Page mode and Page Erase 3

CAD (KiCad official)

  • Symbol: 25LC512T-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25lc512t-i-etched.step / 25lc512t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25lc512t-i.step / 25lc512t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (36 pp, sha256 1efe909df17dd23b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF