component
25LC512T-E
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
| 25lc512t-e-etched.glb | 2d ago |
| 25lc512t-e-etched.step | 2d ago |
| 25lc512t-e-hero.glb | 2d ago |
| 25lc512t-e-hero.overlay.json | 2d ago |
| 25lc512t-e.glb | 2d ago |
| 25lc512t-e.kicad_mod | 2d ago |
| 25lc512t-e.kicad_sym | 2d ago |
| 25lc512t-e.lbr | 2d ago |
| 25lc512t-e.step | 2d ago |
| package.json | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
25LC512T-E
Microchip Tech · EEPROM · SOIC-8
25LC512T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | A low level selects the device, and a high level deselects it and forces it into Standby mode, with SO going high-impedance. |
| 2 | SO | output | Transfers data out of the 25LC512, with data shifted out after the falling edge of the serial clock. |
| 3 | WP | input | With WPEN set, a low level disables writes to the nonvolatile STATUS register bits, and hardware write protection is disabled when WP is high or WPEN is low. |
| 4 | VSS | power_in | Ground reference for the device. |
| 5 | SI | input | Receives instructions, addresses and data, latched on the rising edge of SCK. |
| 6 | SCK | input | Synchronizes communication with the host; SI is latched on the rising edge and SO updates after the falling edge. |
| 7 | HOLD | input | Pulling it low while SCK is low pauses serial communication without resetting the sequence, and it must be held high when this function is not used. |
| 8 | VCC | power_in | Supply voltage, specified from 2.5V to 5.5V in the electrical characteristics. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 27 |
CAD (KiCad official)
- Symbol:
25LC512T-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
25lc512t-e-etched.step/25lc512t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);25lc512t-e.step/25lc512t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (38 pp, sha256
c4706197bd3aa55c, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).