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25LC256T-E

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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25LC256T-E

Microchip Tech · EEPROM · SOIC-8

25LC256T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input: a low level selects the device and a high level deselects it and forces Standby mode.
2 SO output Serial Data Output: data shifts out after the falling edge of SCK and SO goes to high impedance when the device is deselected.
3 WP input Write-Protect input: with WPEN set, WP low disables writes to the nonvolatile bits of the STATUS register.
4 VSS power_in Ground reference for the device.
5 SI input Serial Data Input: instructions, addresses and data are latched on the rising edge of SCK.
6 SCK input Serial Clock input: SI is latched on the rising edge and SO is updated after the falling edge; the device supports a maximum clock of 10 MHz.
7 HOLD input Hold input: must be held high when unused, and pulling it low while SCK is low pauses serial communication without resetting the sequence.
8 VCC power_in Supply voltage: 2.5V to 5.5V for the 25LC256.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Low-level input voltage VIL -0.3 V VCC>=2.5V; max printed as 0.3 VCC 2
Low-level output voltage VOL 0.4 V IOL = 2.1 mA, VCC = 4.5V 2
Low-level output voltage VOL 0.2 V IOL = 1.0 mA, VCC = 2.5V 2
Input leakage current ILI -1 1 uA CS = VCC, VIN = VSS OR VCC 2
Output leakage current ILO -1 1 uA CS = VCC, VOUT = VSS OR VCC 2
Internal Capacitance (all inputs and outputs) CINT 7 pF TA = 25°C, FCLK = 1.0 MHz, VCC = 5.0V (Note 1) 2
Read Operating Current ICC 2.5 6 mA VCC = 5.5V; FCLK = 10.0 MHz; SO = Open 2
Read Operating Current ICC 0.5 2.5 mA VCC = 2.5V; FCLK = 5.0 MHz; SO = Open 2
Write Operating Current ICC 0.6 5 mA VCC = 5.5V 2
Write Operating Current ICC 0.15 3 mA VCC = 2.5V 2
Standby Current ICCS 0.1 5 uA CS = VCC = 5.5V, Inputs tied to VCC or VSS, 125°C 2
Standby Current ICCS 1 uA CS = VCC = 5.5V, Inputs tied to VCC or VSS, 85°C 2
Clock Frequency FCLK 10 MHz 4.5V<=Vcc<=5.5V 3
Clock Frequency FCLK 5 MHz 2.5V<=Vcc<=4.5V 3
CS Setup Time TCSS 50 ns 4.5V<=Vcc<=5.5V 3
CS Setup Time TCSS 100 ns 2.5V<=Vcc<=4.5V 3
CS Hold Time TCSH 100 ns 4.5V<=Vcc<=5.5V 3
CS Hold Time TCSH 200 ns 2.5V<=Vcc<=4.5V 3
CS Disable Time TCSD 50 ns 3
Data Setup Time Tsu 10 ns 4.5V<=Vcc<=5.5V 3
Data Setup Time Tsu 20 ns 2.5V<=Vcc<=4.5V 3
Data Hold Time THD 20 ns 4.5V<=Vcc<=5.5V 3
Data Hold Time THD 40 ns 2.5V<=Vcc<=4.5V 3
CLK Rise Time TR 100 ns Note 1 3
CLK Fall Time TF 100 ns Note 1 3
Clock High Time THI 50 ns 4.5V<=Vcc<=5.5V 3
Clock High Time THI 100 ns 2.5V<=Vcc<=4.5V 3
Clock Low Time TLO 50 ns 4.5V<=Vcc<=5.5V 3
Clock Low Time TLO 100 ns 2.5V<=Vcc<=4.5V 3
Clock Delay Time TCLD 50 ns 3
Clock Enable Time TCLE 50 ns 3
Output Valid from Clock Low TV 50 ns 4.5V<=Vcc<=5.5V 3
Output Valid from Clock Low TV 100 ns 2.5V<=Vcc<=4.5V 3
Output Hold Time THO 0 ns Note 1 3
Output Disable Time TDIS 40 ns 4.5V<=Vcc<=5.5V (Note 1) 3
Output Disable Time TDIS 80 ns 2.5V<=Vcc<=4.5V (Note 1) 3
HOLD Setup Time THS 20 ns 4.5V<=Vcc<=5.5V 3
HOLD Setup Time THS 40 ns 2.5V<=Vcc<=4.5V 3
HOLD Hold Time THH 20 ns 4.5V<=Vcc<=5.5V 3
HOLD Hold Time THH 40 ns 2.5V<=Vcc<=4.5V 3
HOLD Low to Output High-Z THZ 30 ns 4.5V<=Vcc<=5.5V (Note 1) 4
HOLD Low to Output High-Z THZ 60 ns 2.5V<=Vcc<=4.5V (Note 1) 4
HOLD High to Output Valid THV 30 ns 4.5V<=Vcc<=5.5V 4
HOLD High to Output Valid THV 60 ns 2.5V<=Vcc<=4.5V 4
Internal Write Cycle Time TWC 5 ms Note 2 4
Supply voltage VCC 2.5 5.5 V 25LC256 VCC range 1
Ambient temperature (Automotive E) TA -40 125 °C Automotive (E) 2
All inputs and outputs w.r.t. VSS -0.6 V Upper limit printed as VCC+1.0V 2
Storage temperature TSTG -65 150 °C 2
Ambient temperature under bias TA -40 125 °C 2
ESD protection on all pins 4 kV 2

CAD (KiCad official)

  • Symbol: 25LC256T-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25lc256t-e-etched.step / 25lc256t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25lc256t-e.step / 25lc256t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (32 pp, sha256 e39c106f2b850e86, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF