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25LC256-I

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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25LC256-I

Microchip Tech · EEPROM · SOIC-8

25LC256-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input A low level on this pin selects the device and a high level deselects it and forces it into Standby mode, with an already initiated programming cycle completing regardless of CS.
2 SO output Serial data is shifted out on this pin after the falling edge of the serial clock during a read cycle, and SO goes to the high-impedance state when the device is deselected.
3 WP input Write-Protect is used with the WPEN bit in the Status register to prohibit writes to the nonvolatile Status register bits when WP is low and WPEN is high.
4 VSS power_in Ground reference for the device.
5 SI input Serial data input that receives instructions, addresses and data, latched on the rising edge of the serial clock.
6 SCK input Serial clock that synchronizes communication, with SI latched on its rising edge and SO updated after its falling edge.
7 HOLD input Hold input that suspends serial communication when pulled low while SCK is low and must be held high when not used.
8 VCC power_in Supply voltage, specified at 1.8V to 5.5V for the 25AA256 and 2.5V to 5.5V for the 25LC256 in the DC characteristics.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on all inputs and outputs w.r.t. VSS -0.6 V max VCC +1.0V 2
Storage temperature -65 150 °C 2
Ambient temperature under bias -40 125 °C 2
ESD protection on all pins 4 kV 2
Supply voltage range (25LC256) VCC 2.5 5.5 V Device selection table, 25LC256 1
Industrial ambient temperature range TA -40 85 °C Industrial (I) grade 2
Output low-level voltage VOL 0.4 V IOL = 2.1 mA 2
Input leakage current ILI -1 1 µA CS = VCC, VIN = VSS TO VCC 2
Output leakage current ILO -1 1 µA CS = VCC, VOUT = VSS TO VCC 2
Internal Capacitance (all inputs and outputs) CINT 7 pF TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note) 2
Read Operating Current ICC 5 mA VCC = 5.5V; FCLK = 10.0 MHz; SO = Open 2
Read Operating Current ICC 2.5 mA VCC = 2.5V; FCLK = 5.0 MHz; SO = Open 2
Write Operating Current ICC 5 mA VCC = 5.5V 2
Write Operating Current ICC 3 mA VCC = 2.5V 2
Standby Current ICCS 1 µA CS = VCC = 5.5V, Inputs tied to VCC or VSS, 85°C 2
Clock Frequency FCLK 10 MHz 4.5V ≤ Vcc ≤ 5.5V 3
Clock Frequency FCLK 5 MHz 2.5V ≤ Vcc < 4.5V 3
CS Setup Time TCSS 50 ns 4.5V ≤ Vcc ≤ 5.5V 3
CS Setup Time TCSS 100 ns 2.5V ≤ Vcc < 4.5V 3
CS Hold Time TCSH 100 ns 4.5V ≤ Vcc ≤ 5.5V 3
CS Hold Time TCSH 200 ns 2.5V ≤ Vcc < 4.5V 3
CS Disable Time TCSD 50 ns 3
Data Setup Time Tsu 10 ns 4.5V ≤ Vcc ≤ 5.5V 3
Data Setup Time Tsu 20 ns 2.5V ≤ Vcc < 4.5V 3
Data Hold Time THD 20 ns 4.5V ≤ Vcc ≤ 5.5V 3
Data Hold Time THD 40 ns 2.5V ≤ Vcc < 4.5V 3
CLK Rise Time TR 2 µs (Note 1) 3
CLK Fall Time TF 2 µs (Note 1) 3
Clock High Time THI 50 ns 4.5V ≤ Vcc ≤ 5.5V 3
Clock High Time THI 100 ns 2.5V ≤ Vcc < 4.5V 3
Clock Low Time TLO 50 ns 4.5V ≤ Vcc ≤ 5.5V 3
Clock Low Time TLO 100 ns 2.5V ≤ Vcc < 4.5V 3
Clock Delay Time TCLD 50 ns 3
Clock Enable Time TCLE 50 ns 3
Output Valid from Clock Low TV 50 ns 4.5V ≤ Vcc ≤ 5.5V 3
Output Valid from Clock Low TV 100 ns 2.5V ≤ Vcc < 4.5V 3
Output Hold Time THO 0 ns (Note 1) 3
Output Disable Time TDIS 40 ns 4.5V ≤ Vcc ≤ 5.5V (Note 1) 3
Output Disable Time TDIS 80 ns 2.5V ≤ Vcc ≤ 4.5V (Note 1) 3
HOLD Setup Time THS 20 ns 4.5V ≤ Vcc ≤ 5.5V 3
HOLD Setup Time THS 40 ns 2.5V ≤ Vcc < 4.5V 3
HOLD Hold Time THH 20 ns 4.5V ≤ Vcc ≤ 5.5V 4
HOLD Hold Time THH 40 ns 2.5V ≤ Vcc < 4.5V 4
HOLD Low to Output High-Z THZ 30 ns 4.5V ≤ Vcc ≤ 5.5V (Note 1) 4
HOLD Low to Output High-Z THZ 60 ns 2.5V ≤ Vcc < 4.5V (Note 1) 4
HOLD High to Output Valid THV 30 ns 4.5V ≤ Vcc ≤ 5.5V 4
HOLD High to Output Valid THV 60 ns 2.5V ≤ Vcc < 4.5V 4
Internal Write Cycle Time TWC 5 ms (NOTE 2) 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin packaging including 8-lead DFN and 8-lead TSSOP. Pb-free (Pure Sn) finish is also available. 1

CAD (KiCad official)

  • Symbol: 25LC256-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25lc256-i-etched.step / 25lc256-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25lc256-i.step / 25lc256-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (27 pp, sha256 3ee25c695ea482fc, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF