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25LC128-I

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Microchip Tech Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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25LC128-I

Microchip Tech · Pre-ordered Chips · SOIC-8

25LC128-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select: a low level selects the device, a high level deselects it and forces it into Standby mode, and a low level is required after power-up before any sequence can start.
2 SO tri_state Serial Data Output: data are shifted out after the falling edge of SCK during a read, and the pin goes to high-impedance when the device is deselected or HOLD is pulled low.
3 WP input Write-Protect: together with the WPEN bit it blocks writes to the nonvolatile STATUS register bits when WP is low and WPEN is high, and the pin has no effect while WPEN is low.
4 VSS power_in Ground reference for the device.
5 SI input Serial Data Input: receives instructions, addresses and data, which are latched on the rising edge of SCK.
6 SCK input Serial Clock Input: synchronizes communication, with SI latched on the rising edge and SO updated after the falling edge.
7 HOLD input Hold Input: must be held high when unused, and pulling it low while SCK is low pauses serial communication without resetting the sequence while the device stays selected.
8 VCC power_in Supply Voltage: the 25LC128 is specified for 2.5V to 5.5V operation.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Low-Level Input Voltage VIL1 -0.3 V VCC ≥ 2.7V 2
Low-Level Output Voltage VOL 0.4 V IOL = 2.1 mA 2
Input Leakage Current ILI -1 1 µA CS = VCC, VIN = VSS or VCC 2
Output Leakage Current ILO -1 1 µA CS = VCC, VOUT = VSS or VCC 2
Internal Capacitance (all inputs and outputs) CINT 7 pF TA = +25°C, CLK = 1.0 MHz, VCC = 5.0V 2
Read Operating Current ICC 5 mA VCC = 5.5V, FCLK = 10.0 MHz, SO = Open 2
Read Operating Current ICC 2.5 mA VCC = 2.5V, FCLK = 5.0 MHz, SO = Open 2
Write Operating Current ICC 5 mA VCC = 5.5V 2
Write Operating Current ICC 3 mA VCC = 2.5V 2
Standby Current ICCS 1 µA CS = VCC = 5.5V, Inputs tied to VCC or VSS, +85°C 2
Clock Frequency FCLK 10 MHz 4.5V ≤ VCC ≤ 5.5V 3
Clock Frequency FCLK 5 MHz 2.5V ≤ VCC ≤ 4.5V 3
CS Setup Time TCSS 50 ns 4.5V ≤ VCC ≤ 5.5V 3
CS Setup Time TCSS 100 ns 2.5V ≤ VCC ≤ 4.5V 3
CS Hold Time TCSH 100 ns 4.5V ≤ VCC ≤ 5.5V 3
CS Hold Time TCSH 200 ns 2.5V ≤ VCC ≤ 4.5V 3
CS Disable Time TCSD 50 ns 3
Data Setup Time TSU 10 ns 4.5V ≤ VCC ≤ 5.5V 3
Data Setup Time TSU 20 ns 2.5V ≤ VCC ≤ 4.5V 3
Data Hold Time THD 20 ns 4.5V ≤ VCC ≤ 5.5V 3
Data Hold Time THD 40 ns 2.5V ≤ VCC ≤ 4.5V 3
CLK Rise Time TR 100 ns 3
CLK Fall Time TF 100 ns 3
Clock High Time THI 50 ns 4.5V ≤ VCC ≤ 5.5V 3
Clock High Time THI 100 ns 2.5V ≤ VCC ≤ 4.5V 3
Clock Low Time TLO 50 ns 4.5V ≤ VCC ≤ 5.5V 3
Clock Low Time TLO 100 ns 2.5V ≤ VCC ≤ 4.5V 3
Clock Delay Time TCLD 50 ns 3
Clock Enable Time TCLE 50 ns 3
Output Valid from Clock Low TV 50 ns 4.5V ≤ VCC ≤ 5.5V 3
Output Valid from Clock Low TV 100 ns 2.5V ≤ VCC ≤ 4.5V 3
Output Hold Time THO 0 ns 3
Output Disable Time TDIS 40 ns 4.5V ≤ VCC ≤ 5.5V 3
Output Disable Time TDIS 80 ns 2.5V ≤ VCC ≤ 4.5V 3
HOLD Setup Time THS 20 ns 4.5V ≤ VCC ≤ 5.5V 3
HOLD Setup Time THS 40 ns 2.5V ≤ VCC ≤ 4.5V 3
HOLD Hold Time THH 20 ns 4.5V ≤ VCC ≤ 5.5V 4
HOLD Hold Time THH 40 ns 2.5V ≤ VCC ≤ 4.5V 4
HOLD Low to Output High-Z THZ 30 ns 4.5V ≤ VCC ≤ 5.5V 4
HOLD Low to Output High-Z THZ 60 ns 2.5V ≤ VCC ≤ 4.5V 4
HOLD High to Output Valid THV 30 ns 4.5V ≤ VCC ≤ 5.5V 4
HOLD High to Output Valid THV 60 ns 2.5V ≤ VCC ≤ 4.5V 4
Internal Write Cycle Time TWC 5 ms 4
Voltage on all inputs and outputs w.r.t. VSS -0.6 V 2
Storage temperature -65 150 °C 2
Ambient temperature under bias -40 125 °C 2
ESD protection on all pins 4 kV 2
Supply voltage VCC (operating range) VCC 2.5 5.5 V 25LC128 device selection table 1
Ambient temperature range (Industrial) TA -40 85 °C Industrial (I) grade, the -I suffix 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 21

CAD (KiCad official)

  • Symbol: 25LC128-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25lc128-i-etched.step / 25lc128-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25lc128-i.step / 25lc128-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (35 pp, sha256 fe26fc9dad487854, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF