component
25LC040AT-E
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
25LC040AT-E
Microchip Tech · Pre-ordered Chips · SOT-23-6
25LC040AT-E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCK | input | Serial clock input; SI is latched on its rising edge and SO is updated after its falling edge. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | SI | input | Serial data input that receives instructions, addresses and data, latched on the rising edge of SCK. |
| 4 | SO | output | Serial data output; data shifts out after the falling edge of SCK, and SO goes to high-impedance when the device is deselected. |
| 5 | CS | input | Chip Select input; low selects the device, high deselects it and forces Standby mode, and a low-to-high transition after a valid write sequence starts the internal write cycle. |
| 6 | VCC | power_in | Supply voltage; 2.5V to 5.5V for the 25LC040A (Industrial and Automotive ranges), per the device selection table. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Interface ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level Input Voltage | VIH1 | 0.7 | 1 | V | Min printed as 0.7 VCC; max printed as VCC +1 V (VCC term not included in numeric value) | 2 | |
| Low-level Input Voltage | VIL1 | -0.3 | 0.3 | V | VCC ≥ 2.7V (Note 1); max printed as 0.3 VCC | 2 | |
| Low-level Input Voltage | VIL2 | -0.3 | 0.2 | V | VCC < 2.7V (Note 1); max printed as 0.2 VCC | 2 | |
| Low-level Output Voltage | VOL | 0.4 | V | IOL = 2.1 mA | 2 | ||
| Low-level Output Voltage | VOL | 0.2 | V | IOL = 1.0 mA, VCC = 2.5V | 2 | ||
| High-level Output Voltage | VOH | -0.5 | V | IOH = -400 µA; min printed as VCC -0.5 | 2 | ||
| Input Leakage Current | ILI | -1 | 1 | µA | CS = VCC, VIN = VSS or VCC | 2 | |
| Output Leakage Current | ILO | -1 | 1 | µA | CS = VCC, VOUT = VSS or VCC | 2 | |
| Internal Capacitance (all inputs and outputs) | CINT | 7 | pF | TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note 1) | 2 | ||
| Read Operating Current | ICC | 5 | mA | VCC = 5.5V; FCLK = 10.0 MHz; SO = Open | 2 | ||
| Read Operating Current | ICC | 2.5 | mA | VCC = 2.5V; FCLK = 5.0 MHz; SO = Open | 2 | ||
| Write Operating Current | ICC | 5 | mA | VCC = 5.5V | 2 | ||
| Write Operating Current | ICC | 3 | mA | VCC = 2.5V | 2 | ||
| Standby Current | ICCS | 5 | µA | CS = VCC = 5.5V, Inputs tied to VCC or VSS, TA = +125°C | 2 | ||
| Standby Current | ICCS | 1 | µA | CS = VCC = 2.5V, Inputs tied to VCC or VSS, TA = +85°C | 2 | ||
| Clock Frequency | FCLK | 10 | MHz | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Clock Frequency | FCLK | 5 | MHz | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| CS Setup Time | TCSS | 50 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| CS Setup Time | TCSS | 100 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| CS Hold Time | TCSH | 100 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| CS Hold Time | TCSH | 200 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| CS Disable Time | TCSD | 50 | ns | 3 | |||
| Data Setup Time | Tsu | 10 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Data Setup Time | Tsu | 20 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| Data Hold Time | THD | 20 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Data Hold Time | THD | 40 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| CLK Rise Time | TR | 100 | ns | (Note 1) | 3 | ||
| CLK Fall Time | TF | 100 | ns | (Note 1) | 3 | ||
| Clock High Time | THI | 50 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Clock High Time | THI | 100 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| Clock Low Time | TLO | 50 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Clock Low Time | TLO | 100 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| Clock Delay Time | TCLD | 50 | ns | 3 | |||
| Clock Enable Time | TCLE | 50 | ns | 3 | |||
| Output Valid from Clock Low | TV | 50 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Output Valid from Clock Low | TV | 100 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| Output Hold Time | THO | 0 | ns | (Note 1) | 3 | ||
| Output Disable Time | TDIS | 40 | ns | 4.5V ≤ VCC ≤ 5.5V (Note 1) | 3 | ||
| Output Disable Time | TDIS | 80 | ns | 2.5V ≤ VCC ≤ 4.5V (Note 1) | 3 | ||
| HOLD Setup Time | THS | 20 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| HOLD Setup Time | THS | 40 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 | ||
| HOLD Hold Time | THH | 20 | ns | 4.5V ≤ VCC ≤ 5.5V | 4 | ||
| HOLD Hold Time | THH | 40 | ns | 2.5V ≤ VCC ≤ 4.5V | 4 | ||
| HOLD Low to Output High-Z | THZ | 30 | ns | 4.5V ≤ VCC ≤ 5.5V (Note 1) | 4 | ||
| HOLD Low to Output High-Z | THZ | 60 | ns | 2.5V ≤ VCC ≤ 4.5V (Note 1) | 4 | ||
| HOLD High to Output Valid | THV | 30 | ns | 4.5V ≤ VCC ≤ 5.5V | 4 | ||
| HOLD High to Output Valid | THV | 60 | ns | 2.5V ≤ VCC ≤ 4.5V | 4 | ||
| Internal Write Cycle Time (byte or page) | TWC | 5 | ms | (Note 3) | 4 | ||
| Endurance | 1 | M E/W Cycles | 25°C, VCC = 5.5V (Note 2) | 4 | |||
| Voltage on all inputs and outputs w.r.t. VSS | -0.6 | 1 | V | Max printed as VCC +1.0V (VCC term not included in numeric value) | 2 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Ambient Temperature under Bias | TA | -40 | 125 | °C | 2 | ||
| ESD protection on all pins | 4 | kV | 2 | ||||
| Supply Voltage | VCC | 2.5 | 5.5 | V | 25LC040A range per Device Selection Table; Automotive (E) TA = -40°C to +125°C | 1 | |
| Ambient Temperature (Automotive) | TA | -40 | 125 | °C | Automotive (E) range | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | gold | Plastic SOT-23, 6-lead (Tape and Reel only) Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish. | 35 |
CAD (KiCad official)
- Symbol:
25LC040AT-E - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
25lc040at-e-etched.step/25lc040at-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);25lc040at-e.step/25lc040at-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (38 pp, sha256
8595bdb989f67568, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 25LC040AT-E
**Microchip Tech** · Pre-ordered Chips · SOT-23-6
25LC040AT-E from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCK | input | Serial clock input; SI is latched on its rising edge and SO is updated after its falling edge. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | SI | input | Serial data input that receives instructions, addresses and data, latched on the rising edge of SCK. |
| 4 | SO | output | Serial data output; data shifts out after the falling edge of SCK, and SO goes to high-impedance when the device is deselected. |
| 5 | CS | input | Chip Select input; low selects the device, high deselects it and forces Standby mode, and a low-to-high transition after a valid write sequence starts the internal write cycle. |
| 6 | VCC | power_in | Supply voltage; 2.5V to 5.5V for the 25LC040A (Industrial and Automotive ranges), per the device selection table. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Interface ICs |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level Input Voltage | VIH1 | 0.7 | | 1 | V | Min printed as 0.7 VCC; max printed as VCC +1 V (VCC term not included in numeric value) | 2 |
| Low-level Input Voltage | VIL1 | -0.3 | | 0.3 | V | VCC ≥ 2.7V (Note 1); max printed as 0.3 VCC | 2 |
| Low-level Input Voltage | VIL2 | -0.3 | | 0.2 | V | VCC < 2.7V (Note 1); max printed as 0.2 VCC | 2 |
| Low-level Output Voltage | VOL | | | 0.4 | V | IOL = 2.1 mA | 2 |
| Low-level Output Voltage | VOL | | | 0.2 | V | IOL = 1.0 mA, VCC = 2.5V | 2 |
| High-level Output Voltage | VOH | -0.5 | | | V | IOH = -400 µA; min printed as VCC -0.5 | 2 |
| Input Leakage Current | ILI | -1 | | 1 | µA | CS = VCC, VIN = VSS or VCC | 2 |
| Output Leakage Current | ILO | -1 | | 1 | µA | CS = VCC, VOUT = VSS or VCC | 2 |
| Internal Capacitance (all inputs and outputs) | CINT | | | 7 | pF | TA = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note 1) | 2 |
| Read Operating Current | ICC | | | 5 | mA | VCC = 5.5V; FCLK = 10.0 MHz; SO = Open | 2 |
| Read Operating Current | ICC | | | 2.5 | mA | VCC = 2.5V; FCLK = 5.0 MHz; SO = Open | 2 |
| Write Operating Current | ICC | | | 5 | mA | VCC = 5.5V | 2 |
| Write Operating Current | ICC | | | 3 | mA | VCC = 2.5V | 2 |
| Standby Current | ICCS | | | 5 | µA | CS = VCC = 5.5V, Inputs tied to VCC or VSS, TA = +125°C | 2 |
| Standby Current | ICCS | | | 1 | µA | CS = VCC = 2.5V, Inputs tied to VCC or VSS, TA = +85°C | 2 |
| Clock Frequency | FCLK | | | 10 | MHz | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Clock Frequency | FCLK | | | 5 | MHz | 2.5V ≤ VCC ≤ 4.5V | 3 |
| CS Setup Time | TCSS | 50 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| CS Setup Time | TCSS | 100 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| CS Hold Time | TCSH | 100 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| CS Hold Time | TCSH | 200 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| CS Disable Time | TCSD | 50 | | | ns | | 3 |
| Data Setup Time | Tsu | 10 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Data Setup Time | Tsu | 20 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| Data Hold Time | THD | 20 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Data Hold Time | THD | 40 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| CLK Rise Time | TR | | | 100 | ns | (Note 1) | 3 |
| CLK Fall Time | TF | | | 100 | ns | (Note 1) | 3 |
| Clock High Time | THI | 50 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Clock High Time | THI | 100 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| Clock Low Time | TLO | 50 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Clock Low Time | TLO | 100 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| Clock Delay Time | TCLD | 50 | | | ns | | 3 |
| Clock Enable Time | TCLE | 50 | | | ns | | 3 |
| Output Valid from Clock Low | TV | | | 50 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| Output Valid from Clock Low | TV | | | 100 | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| Output Hold Time | THO | 0 | | | ns | (Note 1) | 3 |
| Output Disable Time | TDIS | | | 40 | ns | 4.5V ≤ VCC ≤ 5.5V (Note 1) | 3 |
| Output Disable Time | TDIS | | | 80 | ns | 2.5V ≤ VCC ≤ 4.5V (Note 1) | 3 |
| HOLD Setup Time | THS | 20 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 3 |
| HOLD Setup Time | THS | 40 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 3 |
| HOLD Hold Time | THH | 20 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 4 |
| HOLD Hold Time | THH | 40 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 4 |
| HOLD Low to Output High-Z | THZ | 30 | | | ns | 4.5V ≤ VCC ≤ 5.5V (Note 1) | 4 |
| HOLD Low to Output High-Z | THZ | 60 | | | ns | 2.5V ≤ VCC ≤ 4.5V (Note 1) | 4 |
| HOLD High to Output Valid | THV | 30 | | | ns | 4.5V ≤ VCC ≤ 5.5V | 4 |
| HOLD High to Output Valid | THV | 60 | | | ns | 2.5V ≤ VCC ≤ 4.5V | 4 |
| Internal Write Cycle Time (byte or page) | TWC | | | 5 | ms | (Note 3) | 4 |
| Endurance | | 1 | | | M E/W Cycles | 25°C, VCC = 5.5V (Note 2) | 4 |
| Voltage on all inputs and outputs w.r.t. VSS | | -0.6 | | 1 | V | Max printed as VCC +1.0V (VCC term not included in numeric value) | 2 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 2 |
| Ambient Temperature under Bias | TA | -40 | | 125 | °C | | 2 |
| ESD protection on all pins | | | | 4 | kV | | 2 |
| Supply Voltage | VCC | 2.5 | | 5.5 | V | 25LC040A range per Device Selection Table; Automotive (E) TA = -40°C to +125°C | 1 |
| Ambient Temperature (Automotive) | TA | -40 | | 125 | °C | Automotive (E) range | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | gold | Plastic SOT-23, 6-lead (Tape and Reel only) Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish. | 35 |
## CAD (KiCad official)
- Symbol: `25LC040AT-E`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `25lc040at-e-etched.step` / `25lc040at-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `25lc040at-e.step` / `25lc040at-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/25lc040at-e-datasheet.pdf) (38 pp, sha256 `8595bdb989f67568`, retrieved 2026-10-29, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/25lc040at-e-datasheet.pdf)