component
25AA512T-I
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 4d ago |
| viewers | 4d ago |
| 25aa512t-i-etched.glb | 4d ago |
| 25aa512t-i-etched.step | 4d ago |
| 25aa512t-i-hero.glb | 4d ago |
| 25aa512t-i-hero.overlay.json | 4d ago |
| 25aa512t-i.glb | 4d ago |
| 25aa512t-i.kicad_mod | 4d ago |
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| 25aa512t-i.lbr | 4d ago |
| 25aa512t-i.step | 4d ago |
| package.json | 4d ago |
| page.json | 4d ago |
| README.md | 4d ago |
25AA512T-I
Microchip Tech · EEPROM · SOIC-8
25AA512T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | A low level on this pin selects the device, while a high level deselects it and forces it into Standby mode. |
| 2 | SO | output | Data is shifted out on this pin after the falling edge of the serial clock during a read cycle, and SO goes high-impedance when the device is deselected. |
| 3 | WP | input | When WP is low and WPEN is high, writing to the nonvolatile bits in the STATUS register is disabled while all other operations function normally. |
| 4 | VSS | power_in | Ground reference pin for the device. |
| 5 | SI | input | Receives instructions, addresses and data, which are latched on the rising edge of the serial clock. |
| 6 | SCK | input | Synchronizes communication with the host: SI is latched on the rising clock edge and SO is updated after the falling clock edge. |
| 7 | HOLD | input | Pulling HOLD low while SCK is low suspends serial communication without resetting the sequence, and it must be held high when this function is not used. |
| 8 | VCC | power_in | Supply voltage pin; the device VCC range is 1.8-5.5V per the Device Selection Table. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 26 |
CAD (KiCad official)
- Symbol:
25AA512T-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
25aa512t-i-etched.step/25aa512t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);25aa512t-i.step/25aa512t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (37 pp, sha256
4c4a728797ed8cf9, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).