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25AA128-I

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Microchip Tech Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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25AA128-I

Microchip Tech · Pre-ordered Chips · SOIC-8

25AA128-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Active-low Chip Select: a low level selects the device, while a high level deselects it and forces it into Standby mode.
2 SO output Serial Data Output, which shifts data out after the falling edge of SCK and goes to high-impedance when the device is deselected.
3 WP input Write-Protect, which together with the WPEN bit disables writes to the nonvolatile STATUS register bits when driven low; its function is blocked when WPEN is low.
4 VSS power_in Ground reference for the device.
5 SI input Serial Data Input that receives instructions, addresses and data, latched on the rising edge of SCK.
6 SCK input Serial Clock Input that synchronizes communication; SI is latched on its rising edge and SO updates after its falling edge.
7 HOLD input Hold Input that pauses serial communication when pulled low while SCK is low, and must be held high when not in use.
8 VCC power_in Supply Voltage; the datasheet specifies 1.8V to 5.5V for the 25AA128 and 2.5V to 5.5V for the 25LC128.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-Level Input Voltage VIH 0.7 ×VCC 2
High-Level Input Voltage (upper limit, VCC+1) VIH 1 V re VCC 2
Low-Level Input Voltage (VCC ≥ 2.7V) VIL1 -0.3 V VCC ≥ 2.7V 2
Low-Level Input Voltage (VCC ≥ 2.7V) VIL1 0.3 ×VCC VCC ≥ 2.7V 2
Low-Level Input Voltage (VCC < 2.7V) VIL2 -0.3 V VCC < 2.7V 2
Low-Level Input Voltage (VCC < 2.7V) VIL2 0.2 ×VCC VCC < 2.7V 2
Low-Level Output Voltage VOL 0.4 V IOL = 2.1 mA 2
Low-Level Output Voltage VOL 0.2 V IOL = 1.0 mA, VCC < 2.5V 2
High-Level Output Voltage (lower limit, VCC-0.5) VOH -0.5 V re VCC IOH = -400 µA 2
Input Leakage Current ILI -1 1 µA CS = VCC, VIN = VSS or VCC 2
Output Leakage Current ILO -1 1 µA CS = VCC, VOUT = VSS or VCC 2
Internal Capacitance (all inputs and outputs) CINT 7 pF TA = +25°C, CLK = 1.0 MHz, VCC = 5.0V 2
Read Operating Current ICC 5 mA VCC = 5.5V, FCLK = 10.0 MHz, SO = Open 2
Read Operating Current ICC 2.5 mA VCC = 2.5V, FCLK = 5.0 MHz, SO = Open 2
Write Operating Current ICC 5 mA VCC = 5.5V 2
Write Operating Current ICC 3 mA VCC = 2.5V 2
Standby Current ICCS 1 µA CS = VCC = 5.5V, Inputs tied to VCC or VSS, +85°C 2
Clock Frequency FCLK 10 MHz 4.5V ≤ VCC ≤ 5.5V 3
Clock Frequency FCLK 5 MHz 2.5V ≤ VCC ≤ 4.5V 3
Clock Frequency FCLK 3 MHz 1.8V ≤ VCC ≤ 2.5V 3
CS Setup Time TCSS 50 ns 4.5V ≤ VCC ≤ 5.5V 3
CS Setup Time TCSS 100 ns 2.5V ≤ VCC ≤ 4.5V 3
CS Setup Time TCSS 150 ns 1.8V ≤ VCC ≤ 2.5V 3
CS Hold Time TCSH 100 ns 4.5V ≤ VCC ≤ 5.5V 3
CS Hold Time TCSH 200 ns 2.5V ≤ VCC ≤ 4.5V 3
CS Hold Time TCSH 250 ns 1.8V ≤ VCC ≤ 2.5V 3
CS Disable Time TCSD 50 ns 3
Data Setup Time TSU 10 ns 4.5V ≤ VCC ≤ 5.5V 3
Data Setup Time TSU 20 ns 2.5V ≤ VCC ≤ 4.5V 3
Data Setup Time TSU 30 ns 1.8V ≤ VCC ≤ 2.5V 3
Data Hold Time THD 20 ns 4.5V ≤ VCC ≤ 5.5V 3
Data Hold Time THD 40 ns 2.5V ≤ VCC ≤ 4.5V 3
Data Hold Time THD 50 ns 1.8V ≤ VCC ≤ 2.5V 3
CLK Rise Time TR 100 ns 3
CLK Fall Time TF 100 ns 3
Clock Delay Time TCLD 50 ns 3
Clock Enable Time TCLE 50 ns 3
Output Valid from Clock Low TV 50 ns 4.5V ≤ VCC ≤ 5.5V 3
Output Valid from Clock Low TV 100 ns 2.5V ≤ VCC ≤ 4.5V 3
Output Valid from Clock Low TV 160 ns 1.8V ≤ VCC ≤ 2.5V 3
Output Hold Time THO 0 ns 3
Internal Write Cycle Time TWC 5 ms 4
Output Disable Time TDIS 40 ns 4.5V ≤ VCC ≤ 5.5V 3
Output Disable Time TDIS 80 ns 2.5V ≤ VCC ≤ 4.5V 3
Output Disable Time TDIS 160 ns 1.8V ≤ VCC ≤ 2.5V 3
HOLD High to Output Valid THV 30 ns 4.5V ≤ VCC ≤ 5.5V 4
HOLD High to Output Valid THV 60 ns 2.5V ≤ VCC ≤ 4.5V 4
HOLD High to Output Valid THV 160 ns 1.8V ≤ VCC ≤ 2.5V 4
HOLD Low to Output High-Z THZ 30 ns 4.5V ≤ VCC ≤ 5.5V (Note 1) 4
HOLD Low to Output High-Z THZ 60 ns 2.5V ≤ VCC ≤ 4.5V (Note 1) 4
HOLD Low to Output High-Z THZ 160 ns 1.8V ≤ VCC ≤ 2.5V (Note 1) 4
All inputs and outputs w.r.t. VSS (lower limit) -0.6 V 2
All inputs and outputs w.r.t. VSS (upper limit, VCC+1.0) 1 V re VCC 2
Storage Temperature TSTG -65 150 °C 2
Ambient Temperature Under Bias TA -40 125 °C 2
Supply Voltage (25AA128) VCC 1.8 5.5 V 25AA128, Industrial (I) grade 1
Operating Ambient Temperature (Industrial) TA -40 85 °C Industrial (I) grade 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 21

CAD (KiCad official)

  • Symbol: 25AA128-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25aa128-i-etched.step / 25aa128-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25aa128-i.step / 25aa128-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (35 pp, sha256 fe26fc9dad487854, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF