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24LC64

Public Made by Adom

by adom

lingxingic EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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24LC64

lingxingic · EEPROM · SOP-8

24LC64 from lingxingic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input; A0, A1 and A2 select one of up to eight devices on the same bus, and if left floating they are internally pulled down to GND.
2 A1 input Device address input; A0, A1 and A2 select one of up to eight devices on the same bus, and if left floating they are internally pulled down to GND.
3 A2 input Device address input; A0, A1 and A2 select one of up to eight devices on the same bus, and if left floating they are internally pulled down to GND.
4 GND power_in Ground reference for the device.
5 SDA bidirectional Serial data pin for two-wire bidirectional data transfer; it is open-drain driven and can be wire-ORed with any number of other open-drain or open-collector devices.
6 SCL input Serial clock input; data is shifted into the EEPROM on the SCL rising edge and shifted out on the SCL falling edge.
7 WP input Hardware write protect; tying WP to VCC write-protects the whole array (64K), while tying it to GND allows normal read/write operation.
8 VCC power_in Power supply; the datasheet specifies an operating voltage range of 1.8 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 6.25 V 7
DC output current I 5 mA 7
Voltage on any pin relative to ground -1 7 V 7
Input/output capacitance (SDA) CI/O 8 pF Tamb=25℃, f=1.0MHz, VCC=5V, VI/O=GND 7
Input capacitance (A0, A1, A2, SCL) CIN 6 pF Tamb=25℃, f=1.0MHz, VCC=5V, VIN=GND 7
Operating ambient temperature Tamb -40 85 ℃ 7
Storage temperature Tstg -65 150 ℃ 7
Soldering temperature TL 260 ℃ 10 s, SOP/TSSOP 7
Operating voltage VCC 1.8 5.5 V 8
Operating current, read ICCR 1 mA VCC=5.5V, 400kHz, read operation 8
Operating current, write ICCW 2 mA VCC=5.5V, 400kHz, write operation 8
Standby current ISB1 1 μA VCC=3.3V, VIN=VCC or VSS, Tamb=85℃ 8
Standby current ISB2 3 μA VCC=5.5V, VIN=VCC or VSS, Tamb=85℃ 8
Input leakage current ILI 0.1 1 μA VIN=VCC or GND 8
Output leakage current ILO 0.05 1 μA VOUT=VCC or GND 8
Input low voltage VIL -0.6 V 8
Output low voltage VOL2 0.4 V IOL=2.1mA, VCC=3.0V 8
Output low voltage VOL1 0.2 V IOL=1.5mA, VCC=1.8V 8
Clock frequency, SCL fSCL 400 kHz VCC=1.8V 8
Clock frequency, SCL fSCL 1000 kHz VCC=2.7V 8
Clock low pulse width tLOW 1.3 us VCC=1.8V 8
Clock low pulse width tLOW 0.4 us VCC=2.7V 8
Clock high pulse width tHIGH 0.6 us VCC=1.8V 8
Clock high pulse width tHIGH 0.4 us VCC=2.7V 8
Noise suppression time tI 100 ns VCC=1.8V 8
Noise suppression time tI 50 ns VCC=2.7V 8
Clock low to data output valid tAA 0.05 0.9 us VCC=1.8V 8
Clock low to data output valid tAA 0.05 0.55 us VCC=2.7V 8
Bus free time before new transmission tBUF 1.3 us VCC=1.8V 8
Bus free time before new transmission tBUF 0.5 us VCC=2.7V 8
Start condition hold time tHD.STA 0.6 us VCC=1.8V 8
Start condition hold time tHD.STA 0.25 us VCC=2.7V 8
Start condition setup time tSU.STA 0.6 us VCC=1.8V 9
Start condition setup time tSU.STA 0.25 us VCC=2.7V 9
Data input setup time tSU.D 100 ns VCC=1.8V 9
Input rise time tR 300 ns VCC=1.8V 9
Input fall time tF 300 ns VCC=1.8V 9
Input fall time tF 100 ns VCC=5.0V 9
Stop condition setup time tSU.STO 0.6 us VCC=1.8V 9
Stop condition setup time tSU.STO 0.25 us VCC=2.7V 9
Data output hold time tDH 50 ns VCC=1.8V 9
Write cycle time tWR 5 ms VCC=1.8V 9

CAD (KiCad official)

  • Symbol: 24LC64
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: 24lc64-etched.step / 24lc64-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24lc64.step / 24lc64.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 0b073349ab5e6c02, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF