component
24LC32AT-I
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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24LC32AT-I
Microchip Tech · EEPROM · SOIC-8
24LC32AT-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Chip address input that must be driven to logic 0 or 1 (hard-wired to VCC or VSS) and is compared with the slave address bits to select the chip. |
| 2 | A1 | input | Chip address input that must be connected to either VCC or VSS and is compared with the slave address bits to select the chip. |
| 3 | A2 | input | Chip address input that must be connected to either VCC or VSS and is compared with the slave address bits to select the chip. |
| 4 | VSS | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Open-drain serial address/data I/O that requires a pull-up resistor to VCC (typical 10 k for 100 kHz, 2 k for 400 kHz), and may change only while SCL is low outside Start/Stop conditions. |
| 6 | SCL | input | Serial clock input that synchronizes data transfer to and from the device. |
| 7 | WP | input | Write-protect input that must be tied to VSS (write operations enabled) or VCC (write operations inhibited, read operations unaffected). |
| 8 | VCC | power_in | Power supply pin listed as +1.7V to 5.5V in the pin table; the 24LC32A is specified for 2.5V to 5.5V VCC in the Device Selection Table. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
24LC32AT-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
24lc32at-i-etched.step/24lc32at-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);24lc32at-i.step/24lc32at-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (44 pp, sha256
add48c82161ce0e2, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 24LC32AT-I
**Microchip Tech** · EEPROM · SOIC-8
24LC32AT-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Chip address input that must be driven to logic 0 or 1 (hard-wired to VCC or VSS) and is compared with the slave address bits to select the chip. |
| 2 | A1 | input | Chip address input that must be connected to either VCC or VSS and is compared with the slave address bits to select the chip. |
| 3 | A2 | input | Chip address input that must be connected to either VCC or VSS and is compared with the slave address bits to select the chip. |
| 4 | VSS | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Open-drain serial address/data I/O that requires a pull-up resistor to VCC (typical 10 k for 100 kHz, 2 k for 400 kHz), and may change only while SCL is low outside Start/Stop conditions. |
| 6 | SCL | input | Serial clock input that synchronizes data transfer to and from the device. |
| 7 | WP | input | Write-protect input that must be tied to VSS (write operations enabled) or VCC (write operations inhibited, read operations unaffected). |
| 8 | VCC | power_in | Power supply pin listed as +1.7V to 5.5V in the pin table; the 24LC32A is specified for 2.5V to 5.5V VCC in the Device Selection Table. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `24LC32AT-I`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `24lc32at-i-etched.step` / `24lc32at-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `24lc32at-i.step` / `24lc32at-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588940036410236928) (44 pp, sha256 `add48c82161ce0e2`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/24lc32at-i-datasheet.pdf)