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24LC32A-I

Public Made by Adom

by adom

Tudi EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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24LC32A-I

Tudi · EEPROM · DIP-8

24LC32A-I from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input hardwired to set device address bit A0; it is internally biased low if left floating and is compared against the device address word.
2 A1 input Device address input hardwired to set device address bit A1, allowing up to eight 32K devices on one bus; it is internally biased low if left floating.
3 A2 input Device address input hardwired to set device address bit A2, allowing up to eight 32K devices on one bus; it is internally biased low if left floating.
4 GND power_in Ground reference for the device; WP must be connected to GND for normal read/write operation.
5 SDA bidirectional Open-drain serial data pin that transfers data bidirectionally, may be wire-OR'ed with other open-drain or open-collector devices, and is normally pulled high by an external device.
6 SCL input Serial clock input where data is clocked into the device on the positive edge and clocked out on the negative edge; data on SDA may change only while SCL is low.
7 WP input Write Protect input: connected to GND it allows normal read/write operations, and connected to VCC it enables write protection of the full 32K array.
8 VCC power_in Power supply, specified at VCC = 1.7V to 5.5V for operation at 400kHz (and 2.5V to 5.5V at 1MHz) over the stated temperature range.

Key specifications

Parameter Value
Manufacturer Tudi
Package DIP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Clock Frequency, SCL fSCL 400 kHz 1.7V≤VCC<2.5V 10
Clock Frequency, SCL fSCL 1000 kHz 2.5V≤VCC<5.5V 10
Time the bus must be free before a new transmission can start tBUF 1.3 μs 1.7V≤VCC<2.5V 10
Time the bus must be free before a new transmission can start tBUF 0.5 μs 2.5V≤VCC<5.5V 10
Clock Low to Data Out Valid tAA 0.9 μs 1.7V≤VCC<2.5V 10
Clock Low to Data Out Valid tAA 0.45 μs 2.5V≤VCC<5.5V 10
Noise Suppression Time TI 50 ns 1.7V≤VCC<2.5V 10
Clock Pulse Width High tHIGH 0.6 μs 1.7V≤VCC<2.5V 10
Clock Pulse Width High tHIGH 0.26 μs 2.5V≤VCC<5.5V 10
Clock Pulse Width Low tLOW 1.3 μs 1.7V≤VCC<2.5V 10
Clock Pulse Width Low tLOW 0.5 μs 2.5V≤VCC<5.5V 10
Data Out Hold Time tDH 50 ns 1.7V≤VCC<2.5V 10
Stop Setup Time tSU:STO 0.6 μs 1.7V≤VCC<2.5V 10
Stop Setup Time tSU:STO 0.25 μs 2.5V≤VCC<5.5V 10
Input Fall Time (characterized, not 100% tested) tF 0.3 μs 1.7V≤VCC<2.5V 10
Input Fall Time (characterized, not 100% tested) tF 0.12 μs 2.5V≤VCC<5.5V 10
Input Rise Time (characterized, not 100% tested) tR 0.3 μs 1.7V≤VCC<2.5V 10
Input Rise Time (characterized, not 100% tested) tR 0.12 μs 2.5V≤VCC<5.5V 10
Data in Setup Time tSU:DAT 100 ns 1.7V≤VCC<2.5V 10
Data In Hold Time tHD:DAT 0 μs 1.7V≤VCC<2.5V 10
Start Setup Time tSU:STA 0.6 μs 1.7V≤VCC<2.5V 10
Start Setup Time tSU:STA 0.25 μs 2.5V≤VCC<5.5V 10
Start Hold Time tHD:STA 0.6 μs 1.7V≤VCC<2.5V 10
Start Hold Time tHD:STA 0.25 μs 2.5V≤VCC<5.5V 10
Write Cycle Time tWR 1.9 3 ms 1.7V≤VCC<2.5V 10
Endurance 1 M write cycles 5.0V, 25℃, Byte Mode 10
Output Low Level VOL2 0.4 V VCC=5.0V; IOL=3.0mA 9
Output Low Level VOL1 0.2 V VCC=1.7V; IOL=0.15mA 9
Input Low Level VIL1 -0.3 V VCC=1.7V to 5.5V 9
Output Leakage Current ILO 0.05 1 μA VOUT=VCC or VSS 9
Input Leakage Current ILI 0.1 1 μA VIN=VCC or VSS 9
Standby Supply Current SB1 0.03 0.5 μA VCC=5.0V 9
Write Supply Current CC2 0.28 0.5 mA VCC=5.0V; WRITE at 400KHZ 9
Read Supply Current CC1 0.14 0.3 mA VCC=5.0V; READ at 400KHZ 9
Input Capacitance (A0, A1, A2, SCL) CIN 6 pF VIN=0V; TA=25℃, f=1.0 MHz, VCC=+2.5V 9
Input/Output Capacitance (SDA) CI/O 8 pF VI/O=0V; TA=25℃, f=1.0 MHz, VCC=+2.5V 9
DC Supply Voltage VCC -0.3 6.5 V 9
Input / Output Voltage -0.3 V GND-0.3V to VCC+0.3V 9
Storage Temperature -65 150 ℃ 9
DC Supply Voltage (operating range) VCC 1.7 5.5 V VCC=+1.7V to +5.5V@400kHz; VCC=+2.5V to +5.5V@1MHz 9
Ambient Operating Temperature (industrial) TA -40 85 ℃ 9

CAD (KiCad official)

  • Symbol: 24LC32A-I
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: 24lc32a-i-etched.step / 24lc32a-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24lc32a-i.step / 24lc32a-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Tudi datasheet (17 pp, sha256 85ee3c73e7c96cdb, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF