component
24LC01B-I
Public Made by Adomby adom
Tudi EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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24LC01B-I
Tudi · EEPROM · DIP-8
24LC01B-I from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 2 | A1 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 3 | A2 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Open-drain serial data pin that may be wire-ORed with other open-drain or open-collector devices; data may change only while SCL is low. |
| 6 | SCL | input | Serial clock input; data is clocked into the device on the SCL rising edge and out of the device on the falling edge. |
| 7 | WP | input | Write protect pin: connecting it to GND allows normal read/write operations, while connecting it to VCC enables hardware write protection of the full array. |
| 8 | VCC | power_in | Power supply, 1.7 V to 5.5 V for operation at 400 kHz and 2.5 V to 5.5 V for operation at 1 MHz. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC1 | 1.7 | 5.5 | V | @400kHz | 9 | |
| Supply Voltage | VCC2 | 2.5 | 5.5 | V | @1MHz | 9 | |
| Supply Current READ | IR | 0.14 | 0.3 | mA | VCC=5.0V, READ @400kHz | 9 | |
| Supply Current WRITE | IW | 0.28 | 0.5 | mA | VCC=5.0V, WRITE @400kHz | 9 | |
| Standby Supply Current | ISB | 0.03 | 0.5 | μA | VCC=5.0V, VIN=VCC or VSS | 9 | |
| Input Leakage Current | ILI | 0.1 | 1 | μA | VIN=VCC or VSS | 9 | |
| Output Leakage Current | ILO | 0.05 | 1 | μA | VOUT=VCC or VSS | 9 | |
| Input Low Level | VIL | -0.3 | V | VCC=1.7V to 5.5V; max printed as VCC×0.3 (formula, not numeric) | 9 | ||
| Output Low Level | VOL1 | 0.2 | V | VCC=1.7V, IOL=0.15mA | 9 | ||
| Output Low Level | VOL2 | 0.4 | V | VCC=5.0V, IOL=3.0mA | 9 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VIO=0V; TA=25℃, fSCL=1.0MHz, VCC=+2.5V | 9 | ||
| Input Capacitance (A0,A1,A2,SCL) | CIN | 6 | pF | VIN=0V; TA=25℃, fSCL=1.0MHz, VCC=+2.5V | 9 | ||
| Clock Frequency, SCL | fSCL | 1000 | kHz | 10 | |||
| Clock Pulse Width Low | tLOW | 0.5 | μs | 10 | |||
| Clock Pulse Width High | tHIGH | 0.26 | μs | 10 | |||
| Noise Suppression Time | tI | 50 | ns | 10 | |||
| Clock Low to Data Out Valid | tAA | 0.45 | μs | 10 | |||
| Bus free time before new transmission | tBUF | 0.5 | μs | 10 | |||
| Start Hold Time | tHD:STA | 0.26 | μs | 10 | |||
| Start Setup Time | tSU:STA | 0.26 | μs | 10 | |||
| Data In Hold Time | tHD:DAT | 0 | μs | 10 | |||
| Data In Setup Time | tSU:DAT | 50 | ns | 10 | |||
| Stop Setup Time | tSU:STO | 0.26 | μs | 10 | |||
| Data Out Hold Time | tDH | 50 | ns | 10 | |||
| Write Cycle Time | tWR | 3 | ms | 10 | |||
| Endurance | 1 | M Write Cycle | 5.0V, 25℃, Byte Mode | 10 | |||
| DC Supply Voltage | -0.3 | 6.5 | V | 9 | |||
| Input / Output Voltage | -0.3 | V | Printed as GND-0.3V to VCC+0.3V; min relative to GND, max is VCC+0.3V (not numeric) | 9 | |||
| Storage Temperature | -65 | 150 | ℃ | 9 | |||
| Ambient Temperature (Industrial, -I grade) | TA | -40 | 85 | ℃ | Industrial grade per DC table header (24LC01/24AA01 TA=-40℃ to +85℃) | 9 |
CAD (KiCad official)
- Symbol:
24LC01B-I - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
24lc01b-i-etched.step/24lc01b-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);24lc01b-i.step/24lc01b-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (17 pp, sha256
676346be2fb87e9e, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 24LC01B-I
**Tudi** · EEPROM · DIP-8
24LC01B-I from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 2 | A1 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 3 | A2 | input | Device address input hardwired to select the device address bit; the datasheet states that the pin is biased to logic low internally if left floating. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Open-drain serial data pin that may be wire-ORed with other open-drain or open-collector devices; data may change only while SCL is low. |
| 6 | SCL | input | Serial clock input; data is clocked into the device on the SCL rising edge and out of the device on the falling edge. |
| 7 | WP | input | Write protect pin: connecting it to GND allows normal read/write operations, while connecting it to VCC enables hardware write protection of the full array. |
| 8 | VCC | power_in | Power supply, 1.7 V to 5.5 V for operation at 400 kHz and 2.5 V to 5.5 V for operation at 1 MHz. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC1 | 1.7 | | 5.5 | V | @400kHz | 9 |
| Supply Voltage | VCC2 | 2.5 | | 5.5 | V | @1MHz | 9 |
| Supply Current READ | IR | | 0.14 | 0.3 | mA | VCC=5.0V, READ @400kHz | 9 |
| Supply Current WRITE | IW | | 0.28 | 0.5 | mA | VCC=5.0V, WRITE @400kHz | 9 |
| Standby Supply Current | ISB | | 0.03 | 0.5 | μA | VCC=5.0V, VIN=VCC or VSS | 9 |
| Input Leakage Current | ILI | | 0.1 | 1 | μA | VIN=VCC or VSS | 9 |
| Output Leakage Current | ILO | | 0.05 | 1 | μA | VOUT=VCC or VSS | 9 |
| Input Low Level | VIL | -0.3 | | | V | VCC=1.7V to 5.5V; max printed as VCC×0.3 (formula, not numeric) | 9 |
| Output Low Level | VOL1 | | | 0.2 | V | VCC=1.7V, IOL=0.15mA | 9 |
| Output Low Level | VOL2 | | | 0.4 | V | VCC=5.0V, IOL=3.0mA | 9 |
| Input/Output Capacitance (SDA) | CI/O | | | 8 | pF | VIO=0V; TA=25℃, fSCL=1.0MHz, VCC=+2.5V | 9 |
| Input Capacitance (A0,A1,A2,SCL) | CIN | | | 6 | pF | VIN=0V; TA=25℃, fSCL=1.0MHz, VCC=+2.5V | 9 |
| Clock Frequency, SCL | fSCL | | | 1000 | kHz | | 10 |
| Clock Pulse Width Low | tLOW | 0.5 | | | μs | | 10 |
| Clock Pulse Width High | tHIGH | 0.26 | | | μs | | 10 |
| Noise Suppression Time | tI | | | 50 | ns | | 10 |
| Clock Low to Data Out Valid | tAA | | | 0.45 | μs | | 10 |
| Bus free time before new transmission | tBUF | 0.5 | | | μs | | 10 |
| Start Hold Time | tHD:STA | 0.26 | | | μs | | 10 |
| Start Setup Time | tSU:STA | 0.26 | | | μs | | 10 |
| Data In Hold Time | tHD:DAT | 0 | | | μs | | 10 |
| Data In Setup Time | tSU:DAT | 50 | | | ns | | 10 |
| Stop Setup Time | tSU:STO | 0.26 | | | μs | | 10 |
| Data Out Hold Time | tDH | 50 | | | ns | | 10 |
| Write Cycle Time | tWR | | | 3 | ms | | 10 |
| Endurance | | 1 | | | M Write Cycle | 5.0V, 25℃, Byte Mode | 10 |
| DC Supply Voltage | | -0.3 | | 6.5 | V | | 9 |
| Input / Output Voltage | | -0.3 | | | V | Printed as GND-0.3V to VCC+0.3V; min relative to GND, max is VCC+0.3V (not numeric) | 9 |
| Storage Temperature | | -65 | | 150 | ℃ | | 9 |
| Ambient Temperature (Industrial, -I grade) | TA | -40 | | 85 | ℃ | Industrial grade per DC table header (24LC01/24AA01 TA=-40℃ to +85℃) | 9 |
## CAD (KiCad official)
- Symbol: `24LC01B-I`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `24lc01b-i-etched.step` / `24lc01b-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `24lc01b-i.step` / `24lc01b-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Tudi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604434808043433984) (17 pp, sha256 `676346be2fb87e9e`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/24lc01b-i-datasheet.pdf)