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24FC128T-I

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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24FC128T-I

Microchip Tech · EEPROM · SOIC-8

24FC128T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input User-configurable chip address input that must be tied to VCC or VSS, and the chip is selected only when its level matches the corresponding client address bit.
2 A1 input User-configurable chip address input that must be tied to VCC or VSS, and the chip is selected only when its level matches the corresponding client address bit.
3 A2 input User-configurable chip address input that must be tied to VCC or VSS, and the chip is selected only when its level matches the corresponding client address bit.
4 VSS power_in Ground reference for the device.
5 SDA bidirectional Open-drain serial address/data I/O that requires a pull-up resistor to VCC (typically 10 kΩ for 100 kHz and 2 kΩ for 400 kHz and 1 MHz) and may change only while SCL is low, except for Start and Stop conditions.
6 SCL input Serial clock input used to synchronize data transfer to and from the device.
7 WP input Write-protect input that must be connected to VSS to enable write operations or to VCC to inhibit writes while reads are unaffected.
8 VCC power_in Power supply input; the 24FC128 operates from 1.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-Level Input Voltage VIH 0.7 VCC 3
Low-Level Input Voltage VIL 0.3 VCC VCC ≥ 2.5V 3
Low-Level Input Voltage VIL 0.2 VCC VCC < 2.5V 3
Hysteresis of Schmitt Trigger Inputs (SDA, SCL pins) VHYS 0.05 VCC VCC ≥ 2.5V (Note 1) 3
Low-Level Output Voltage VOL 0.4 V IOL = 3.0 mA @ VCC = 4.5V 3
Input Leakage Current ILI -1 1 µA VIN = VSS or VCC, WP = VSS 3
Output Leakage Current ILO -1 1 µA VOUT = VSS or VCC 3
Pin Capacitance (all inputs/outputs) CIN, COUT 10 pF VCC = 5.0V (Note 1); TA = +25°C, FCLK = 1 MHz 3
Read Operating Current ICC 400 µA VCC = 5.5V, SCL = 400 kHz 3
Write Operating Current ICC 3 mA VCC = 5.5V 3
Standby Current ICCS 1 µA SDA = SCL = VCC = 5.5V; A0, A1, A2, WP = VSS, I-Temp 3
All inputs and outputs w.r.t. VSS -0.6 V upper limit printed as VCC + 1.0V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
ESD protection on all pins 4 kV 3
Supply voltage VCC (Industrial) VCC 1.7 5.5 V Industrial (I) range 3
Ambient temperature TA (Industrial) TA -40 85 °C Industrial (I) range 3
Clock Frequency FCLK 400 kHz 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Clock Frequency FCLK 1000 kHz 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
Clock High Time THIGH 600 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Clock High Time THIGH 500 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
Clock Low Time TLOW 1300 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Clock Low Time TLOW 500 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
SDA and SCL Rise Time TR 300 ns 1.7V ≤ VCC ≤ 5.5V (24FC128) (Note 1) 4
SDA and SCL Fall Time TF 100 ns 1.7V ≤ VCC ≤ 5.5V (24FC128) (Note 1) 4
Start Condition Hold Time THD:STA 600 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Start Condition Hold Time THD:STA 250 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
Start Condition Setup Time TSU:STA 600 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Start Condition Setup Time TSU:STA 250 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
Data Input Hold Time THD:DAT 0 ns Note 2 4
Data Input Setup Time TSU:DAT 100 ns 1.7V ≤ VCC ≤ 5.5V (24FC128) 4
Stop Condition Setup Time TSU:STO 600 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 4
Stop Condition Setup Time TSU:STO 250 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 4
WP Setup Time TSU:WP 600 ns 1.7V ≤ VCC ≤ 5.5V (24FC128) 5
WP Hold Time THD:WP 1300 ns 1.7V ≤ VCC ≤ 5.5V (24FC128) 5
Output Valid From Clock TAA 900 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) (Note 2) 5
Output Valid From Clock TAA 400 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) (Note 2) 5
Bus Free Time TBUF 1300 ns 1.7V ≤ VCC ≤ 2.5V (24FC128) 5
Bus Free Time TBUF 500 ns 2.5V ≤ VCC ≤ 5.5V (24FC128) 5
Output Fall Time from VIH Minimum to VIL Maximum TOF 250 ns 24FC128 (Note 1) 5
Write Cycle Time (byte or page) TWC 5 ms 5
Endurance 1e+06 cycles +25°C, 5.5V, Page Mode (Note 4) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 25

CAD (KiCad official)

  • Symbol: 24FC128T-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 24fc128t-i-etched.step / 24fc128t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24fc128t-i.step / 24fc128t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (42 pp, sha256 7563b7f0ab4e94a7, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF