24C16BN

{
 "schema": "adom.pads/1",
 "slug": "24c16bn",
 "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
 },
 "pad_count": 8,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "NC",
   "type": "unconnected",
   "description": "No connect. 24C16 does not use any device address pins, so on the 8-lead DIP/SOP/MSOP/TSSOP package pins 1-3 are unused and may be left floating or tied to GND.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "NC",
   "type": "unconnected",
   "description": "No connect. Unused on the 8-lead SOP variant; leave floating or tie to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "NC",
   "type": "unconnected",
   "description": "No connect. Unused on the 8-lead SOP variant; leave floating or tie to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "GND",
   "type": "power_in",
   "description": "Ground reference for the device.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "SDA",
   "type": "bidirectional",
   "description": "Serial data input / open-drain output for the two-wire (I2C-compatible) bus. Requires an external pull-up resistor to VCC (typ. 4.7 kOhm). Can be wire-ORed with other open-drain outputs. Schmitt-trigger filtered input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "SCL",
   "type": "input",
   "description": "Serial clock input for the two-wire (I2C-compatible) bus. Rising edge latches data into the EEPROM; falling edge clocks data out. Requires an external pull-up resistor to VCC. Bus rates up to 1 MHz (VCC >= 2.5 V) or 400 kHz (VCC = 1.8 V).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "WP",
   "type": "input",
   "description": "Write Protect. Tie to VIL (or GND) to allow programming of the EEPROM array; tie to VIH (or VCC) to disable all write/programming operations. Read operations are unaffected. Internally recognized as VIL if left floating, but the datasheet recommends always driving WP to a known state (pull-up/down resistor <=10 kOhm) to avoid capacitive coupling issues.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive power supply, 1.8 V to 5.5 V. Standby current typically 0.02 uA @ 1.8 V and 0.06 uA @ 5.5 V. Decouple with a 0.1 uF ceramic capacitor close to the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}