component
24C04BN
Public Made by Adomby adom
XBLW EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdown24C04BN
XBLW · EEPROM · SOP-8
24C04BN from XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No-connect. Not internally bonded; may be left floating. |
| 2 | A1 | input | Device address input bit 1. Hardwired to VIH or VIL to set the chip's I2C device address (matched against the 5th/6th device-address bits). Floating pins are internally recognized as VIL; a pull-up/pull-down of 10 kOhm or less is recommended. |
| 3 | A2 | input | Device address input bit 2. Hardwired to VIH or VIL to set the chip's I2C device address. Floating pins default to VIL internally; recommended pull-up/down 10 kOhm or less. |
| 4 | GND | power_in | Device ground reference (0 V). |
| 5 | SDA | bidirectional | Serial data line. Bidirectional open-drain I/O for the 2-wire (I2C-compatible) bus. Requires an external pull-up resistor; can be wire-ORed with other open-drain devices. |
| 6 | SCL | input | Serial clock input. Rising edge latches data into the EEPROM; falling edge clocks data out. Schmitt-triggered filtered input; supports 1 MHz (2.5-5V) or 400 kHz (1.8V). |
| 7 | WP | input | Write protect. Tie to VIL (or leave floating) to allow programming; tie to VIH or VCC to disable all programming operations. Read operations are unaffected. Recommended pull-up/down 10 kOhm or less. |
| 8 | VCC | power_in | Positive supply. 1.8 V to 5.5 V (industrial temperature range -40 C to 85 C). Standby current typically < 1 uA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
24C04BN24C04BNN24C04BNMN24C04BNTN24C04BNDN24C04BND624C04BNS
CAD (KiCad official)
- Symbol:
24C04BN - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
24c04bn-etched.step/24c04bn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);24c04bn.step/24c04bn.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
24c04bn.step |
122 KB | You want the bare part, or you mark your own boards. |
24c04bn-etched.step |
1.6 MB | You want the part with 24C04BN already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 412 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (20 pp, sha256
aed51281433cee82, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).