component

24C02BN

Public Made by Adom

by adom

XBLW EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 24c02bn: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
24c02bn-etched.fit.json 24c02bn: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
24c02bn-etched.glb 24c02bn: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body wit… · Ray
24c02bn-etched.step 24c02bn: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body wit… · Ray
24c02bn-hero.glb 24c02bn: hero from the plain model · Ray
24c02bn-hero.overlay.json 24c02bn: hero from the plain model · Ray
24c02bn.glb Publish 0.1.0 · Ray
24c02bn.kicad_mod Publish 0.1.0 · Ray
24c02bn.kicad_sym Publish 0.1.0 · Ray
24c02bn.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
24c02bn.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md 24c02bn: manufacturer 'XBLW' (was 'XBLW 24C02BN XBLW': the MPN had been folded in) · Ray

24C02BN

XBLW · EEPROM · SOP-8

24C02BN from XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Hardwired to VIH or VIL to set the chip select address (up to 8 devices on one I2C bus). If left unconnected it is internally recognized as VIL, but a pull-up/pull-down of 10 kΩ or less to a known state is recommended.
2 A1 input Device address input bit 1. Hardwired to VIH or VIL to set the chip select address. Internally recognized as VIL if floating; 10 kΩ or less pull to a known state is recommended.
3 A2 input Device address input bit 2. Hardwired to VIH or VIL to set the chip select address. Internally recognized as VIL if floating; 10 kΩ or less pull to a known state is recommended.
4 GND power_in Ground reference for the device.
5 SDA bidirectional Serial data line. Bi-directional open-drain I/O for the two-wire (I2C) bus; requires an external pull-up resistor and may be wire-OR'd with other open-drain devices. Data may change only while SCL is low.
6 SCL input Serial clock input. Rising edge latches data into the EEPROM, falling edge clocks data out. Compatible with 1 MHz (2.5-5V) or 400 kHz (1.8V) operation.
7 WP input Hardware write protect. When tied to VIH/VCC, all programming (write) operations are disabled; tie to VIL or leave floating to enable writes. Read operations are unaffected. If unconnected it is internally recognized as VIL; a 10 kΩ or less pull to a known state is recommended.
8 VCC power_in Positive supply input. Operating range 1.8 V to 5.5 V. Bypass with a local decoupling capacitor to GND.

Key specifications

Parameter Value
Manufacturer XBLW
Package SOP-8
Category Memory
Pins 8

Ordering variants

  • 24C02BN
  • 24C02BNN
  • 24C02BNMN
  • 24C02BNTN
  • 24C02BNDN
  • 24C02BND6
  • 24C02BNS

CAD (KiCad official)

  • Symbol: 24C02BN
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: 24c02bn-etched.step / 24c02bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24c02bn.step / 24c02bn.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
24c02bn.step 122 KB You want the bare part, or you mark your own boards.
24c02bn-etched.step 1.7 MB You want the part with 24C02BN already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 425 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (21 pp, sha256 c749bcc03016eed9, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF