component
24C01BN
Public Made by Adomby adom
XBLW EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+53@@ -0,0 +1,53 @@+# 24C01BN++**XBLW 24C01BN XBLW** · EEPROM · SOP-8++24C01BN from XBLW 24C01BN XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | Device address input bit 0. Hardwire to VIH or VIL to set the chip's slave address; if left unconnected it is internally recognized as VIL, but a 10 kΩ or smaller pull-up/pull-down to a known state is recommended to avoid capacitive coupling. |+| 2 | A1 | input | Device address input bit 1. Hardwire to VIH or VIL to set the chip's slave address; internally pulled to VIL if left floating, 10 kΩ or smaller pull-up/pull-down recommended. |+| 3 | A2 | input | Device address input bit 2. Hardwire to VIH or VIL to set the chip's slave address; internally pulled to VIL if left floating, 10 kΩ or smaller pull-up/pull-down recommended. |+| 4 | GND | power_in | Ground reference for the device. |+| 5 | SDA | bidirectional | Serial data input / open-drain output for the 2-wire (I2C-compatible) bus. Requires an external pull-up resistor; can be wire-OR'd with other open-drain devices on the same bus. |+| 6 | SCL | input | Serial clock input for the 2-wire (I2C-compatible) bus. Rising edge latches data into the EEPROM; falling edge clocks data out. Supports up to 1 MHz at 2.5-5V or 400 kHz at 1.8V. |+| 7 | WP | input | Write-protect input. Tie to VIH or Vcc to disable all programming operations (read still works); tie to VIL to allow writes. Internally recognized as VIL if unconnected; 10 kΩ or smaller pull to a known state recommended. |+| 8 | VCC | power_in | Positive supply, 1.8 V to 5.5 V. Standard 100 nF decoupling to GND recommended near the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XBLW 24C01BN XBLW |+| Package | SOP-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `24C01BNBN`+- `24C01BNN`+- `24C01BNMN`+- `24C01BNTN`+- `24C01BNDN`+- `24C01BND6`+- `24C01BNS`++## CAD (KiCad official)++- Symbol: `24C01BN`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XBLW 24C01BN XBLW datasheet](docs/24c01bn-datasheet.pdf) (20 pp, sha256 `6d6af116da82cd71`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/24c01bn-datasheet.pdf)
page.jsonadded+34@@ -0,0 +1,34 @@+{+ "slug": "24c01bn",+ "version": "0.1.0",+ "type": "component",+ "description": "XBLW 24C01BN XBLW EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "memory",+ "24c01bn"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "24c01bn.kicad_sym",+ "24c01bn.kicad_mod",+ "24c01bn.glb",+ "24c01bn.step",+ "24c01bn.lbr",+ "docs/hero.png",+ "docs/24c01bn-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "visibility": "public",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}