component

24AA512-I

Public Made by Adom

by adom

Tudi EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemory24aa512-ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers 24aa512-i: viewers · Ray 8d ago
24aa512-i-etched.glb Publish 0.1.0 · Ray 8d ago
24aa512-i-etched.step 24aa512-i: factory component page (tier=lcsc) · Ray 8d ago
24aa512-i-hero.glb 24aa512-i: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
24aa512-i-hero.overlay.json Publish 0.1.0 · Ray 8d ago
24aa512-i.glb Publish 0.1.0 · Ray 8d ago
24aa512-i.kicad_mod Publish 0.1.0 · Ray 8d ago
24aa512-i.kicad_sym Publish 0.1.0 · Ray 8d ago
24aa512-i.lbr Publish 0.1.0 · Ray 8d ago
24aa512-i.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

24AA512-I

Tudi · EEPROM · DIP-8

24AA512-I from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input A0 for hardware addressing (up to eight devices on one bus); when left floating it is defaulted to zero.
2 A1 input Device address input A1 for hardware addressing (up to eight devices on one bus); when left floating it is defaulted to zero.
3 A2 input Device address input A2 for hardware addressing (up to eight devices on one bus); when left floating it is defaulted to zero.
4 GND power_in Ground of the supply voltage.
5 SDA bidirectional Serial address and data input/output; an open-drain pin that requires a pull-up resistor to the power supply and can be wire-ORed with other open-drain or open-collector outputs.
6 SCL input Serial clock input that synchronizes data transfer to and from the device.
7 WP input Write-protect input: when tied to VCC the entire array is write-protected (read-only), and when tied to GND or left floating normal write operations are allowed.
8 VCC power_in Power supply; the device operates from 1.7V to 5.5V per the DC/Operating Range (24AA512 is rated 1.8V to 5.5V in the device selection table).

Key specifications

Parameter Value
Manufacturer Tudi
Package DIP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Serial Clock Frequency FSCL (1.7V≤VCC<2.5V) FSCL 400 KHz 1.7V≤VCC<2.5V 12
Serial Clock Frequency FSCL (2.5V≤VCC<4.5V) FSCL 1000 KHz 2.5V≤VCC<4.5V 12
Serial Clock Frequency FSCL (4.5V≤VCC≤5.5V) FSCL 1000 KHz 4.5V≤VCC≤5.5V 12
Clock Low Period (1.7V≤VCC<2.5V) TLOW 1200 ns 1.7V≤VCC<2.5V 12
Clock Low Period (2.5V≤VCC<4.5V) TLOW 400 ns 2.5V≤VCC<4.5V 12
Clock Low Period (4.5V≤VCC≤5.5V) TLOW 400 ns 4.5V≤VCC≤5.5V 12
Clock High Period (1.7V≤VCC<2.5V) THIGH 600 ns 1.7V≤VCC<2.5V 12
Clock High Period (2.5V≤VCC<4.5V) THIGH 400 ns 2.5V≤VCC<4.5V 12
Clock High Period (4.5V≤VCC≤5.5V) THIGH 400 ns 4.5V≤VCC≤5.5V 12
Fall Time SCL and SDA (1.7V≤VCC<2.5V) TF 300 ns 1.7V≤VCC<2.5V 12
Fall Time SCL and SDA (2.5V≤VCC<4.5V) TF 100 ns 2.5V≤VCC<4.5V 12
Fall Time SCL and SDA (4.5V≤VCC≤5.5V) TF 100 ns 4.5V≤VCC≤5.5V 12
Start Condition Setup Time (1.7V≤VCC<2.5V) TSU:STA 600 ns 1.7V≤VCC<2.5V 12
Start Condition Setup Time (2.5V≤VCC<4.5V) TSU:STA 200 ns 2.5V≤VCC<4.5V 12
Start Condition Setup Time (4.5V≤VCC≤5.5V) TSU:STA 200 ns 4.5V≤VCC≤5.5V 12
Stop Condition Setup Time (1.7V≤VCC<2.5V) TSU:STO 600 ns 1.7V≤VCC<2.5V 12
Stop Condition Setup Time (2.5V≤VCC<4.5V) TSU:STO 200 ns 2.5V≤VCC<4.5V 12
Stop Condition Setup Time (4.5V≤VCC≤5.5V) TSU:STO 200 ns 4.5V≤VCC≤5.5V 12
Start Condition Hold Time (1.7V≤VCC<2.5V) THD:STA 600 ns 1.7V≤VCC<2.5V 12
Start Condition Hold Time (2.5V≤VCC<4.5V) THD:STA 200 ns 2.5V≤VCC<4.5V 12
Start Condition Hold Time (4.5V≤VCC≤5.5V) THD:STA 200 ns 4.5V≤VCC≤5.5V 12
Data In Setup Time (1.7V≤VCC<2.5V) TSU:DAT 100 ns 1.7V≤VCC<2.5V 12
Data In Setup Time (2.5V≤VCC<4.5V) TSU:DAT 40 ns 2.5V≤VCC<4.5V 12
Data In Setup Time (4.5V≤VCC≤5.5V) TSU:DAT 40 ns 4.5V≤VCC≤5.5V 12
Clock to Output Access time (1.7V≤VCC<2.5V) TAA 100 900 ns 1.7V≤VCC<2.5V 12
Clock to Output Access time (2.5V≤VCC<4.5V) TAA 50 400 ns 2.5V≤VCC<4.5V 12
Clock to Output Access time (4.5V≤VCC≤5.5V) TAA 50 400 ns 4.5V≤VCC≤5.5V 12
Data Out Hold Time (1.7V≤VCC<2.5V) TDH 100 ns 1.7V≤VCC<2.5V 12
Data Out Hold Time (2.5V≤VCC<4.5V) TDH 50 ns 2.5V≤VCC<4.5V 12
Data Out Hold Time (4.5V≤VCC≤5.5V) TDH 50 ns 4.5V≤VCC≤5.5V 12
Write Cycle Time (1.7V≤VCC<2.5V) TWR 5 ms 1.7V≤VCC<2.5V 12
Write Cycle Time (2.5V≤VCC<4.5V) TWR 5 ms 2.5V≤VCC<4.5V 12
Write Cycle Time (4.5V≤VCC≤5.5V) TWR 5 ms 4.5V≤VCC≤5.5V 12
Bus Free Time Before New Transmission (1.7V≤VCC<2.5V) TBUF 1000 ns 1.7V≤VCC<2.5V 12
Bus Free Time Before New Transmission (2.5V≤VCC<4.5V) TBUF 400 ns 2.5V≤VCC<4.5V 12
Bus Free Time Before New Transmission (4.5V≤VCC≤5.5V) TBUF 400 ns 4.5V≤VCC≤5.5V 12
Ambient Temperature (Industrial) TA -40 85 °C Industrial range 10
Supply Voltage VCC 1.7 5.5 V 11
Supply Voltage (absolute maximum) VS -0.5 6.5 V 10
Voltage on Any Pin VP -0.5 V Max printed as VCC + 0.5 V (not numeric) 10
Temperature Under Bias TBIAS -55 125 °C 10
Storage Temperature TSTG -65 150 °C 10
Output Current IOUT 5 mA 10
Input Capacitance CIN 6 pF VIN = 0V 10
Input / Output Capacitance CI/O 8 pF VI/O = 0V 10
Input Low Voltage VIL -1 V Max printed as 0.3*VCC (not numeric) 11
Input Leakage Current ILI 2 µA VCC=5V, VIN = VCC max 11
Output Leakage Current ILO 2 µA VCC=5V 11
Output Low Voltage VOL1 0.2 V VCC=1.7V, IOL = 0.15 mA 11
Output Low Voltage VOL2 0.4 V VCC=3V, IOL = 2.1 mA 11
Standby Current ISB1 1 µA VCC=1.7V, VIN = VCC or GND 11
Standby Current ISB2 2 µA VCC=2.5V, VIN = VCC or GND 11
Standby Current ISB3 3 µA VCC=5V, VIN = VCC or GND 11
Read Current ICC1 0.5 mA VCC=1.7V, read at 400 KHz 11
Read Current ICC1 1 mA VCC=2.5V, read at 1 MHz 11
Write Current ICC2 2 mA VCC=1.7V, write at 400 KHz 11
Write Current ICC2 3 mA VCC=2.5V, write at 1 MHz 11

CAD (KiCad official)

  • Symbol: 24AA512-I
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: 24aa512-i-etched.step / 24aa512-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24aa512-i.step / 24aa512-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Tudi datasheet (15 pp, sha256 74e008b3faf14523, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF