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24AA1025-I

Public Made by Adom

by adom

Microchip Tech Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

markdown

24AA1025-I

Microchip Tech · Pre-ordered Chips · SOIC-8

24AA1025-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input User-configurable chip select input compared with the slave address bit; hard-wire to logic 0 or 1 to allow up to four devices on one bus.
2 A1 input User-configurable chip select input compared with the slave address bit; hard-wire to logic 0 or 1 to allow up to four devices on one bus.
3 A2 input Non-configurable chip select that must be tied to VCC, as operation is undefined if left floating or tied to VSS.
4 VSS power_in Ground.
5 SDA bidirectional Open-drain bidirectional serial data pin for addresses and data, requiring a pull-up to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz).
6 SCL input Serial clock input used to synchronize data transfer to and from the device.
7 WP input Write-protect input that must be tied to VSS (writes enabled) or VCC (writes inhibited, reads unaffected).
8 VCC power_in Supply voltage of +1.7 to 5.5V for the 24AA1025 (2.5 to 5.5V for 24LC1025, 1.8 to 5.5V for 24FC1025).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature -65 150 °C 2
Ambient temperature with power applied -40 125 °C 2
ESD protection on all pins 4 kV 2
Supply voltage range (24AA1025) VCC 1.7 5.5 V Industrial (I) 2
Operating ambient temperature TA -40 85 °C Industrial (I) 2
High-level input voltage VIH 0.7 VCC 0.7 VCC; A1, A2, SCL, SDA, WP pins 2
Low-level input voltage VIL 0.3 VCC 0.3 VCC; VCC ≥ 2.5V 2
Low-level input voltage VIL 0.2 VCC 0.2 VCC; VCC < 2.5V 2
Hysteresis of Schmitt Trigger inputs VHYS 0.05 VCC 0.05 VCC; VCC ≥ 2.5V (SDA, SCL pins) 2
Low-level output voltage VOL 0.4 V IOL = 3.0 mA @ VCC = 4.5V 2
Input leakage current ILI -1 1 µA VIN = VSS or VCC 2
Output leakage current ILO -1 1 µA VOUT = VSS or VCC 2
Pin capacitance (all inputs/outputs) CIN, COUT 10 pF VCC = 5.0V, TA = 25°C, FCLK = 1 MHz 2
Read operating current ICC 450 µA VCC = 5.5V, SCL = 400 kHz 2
Write operating current ICC 5 mA VCC = 5.5V 2
Standby current ICCS 5 µA SCL, SDA, VCC = 5.5V; A1, A2, WP = VSS 2
Clock frequency FCLK 100 kHz 1.7V ≤ VCC < 2.5V 3
Clock frequency FCLK 400 kHz 2.5V ≤ VCC ≤ 5.5V 3
Clock high time THIGH 4000 ns 1.7V ≤ VCC < 2.5V 3
Clock high time THIGH 600 ns 2.5V ≤ VCC ≤ 5.5V 3
Clock low time TLOW 4700 ns 1.7V ≤ VCC < 2.5V 3
Clock low time TLOW 1300 ns 2.5V ≤ VCC ≤ 5.5V 3
SDA and SCL rise time TR 1000 ns 1.7V ≤ VCC < 2.5V 3
SDA and SCL rise time TR 300 ns 2.5V ≤ VCC ≤ 5.5V 3
SDA and SCL fall time TF 300 ns All except 24FC1025 3
Start condition hold time THD:STA 4000 ns 1.7V ≤ VCC < 2.5V 3
Start condition hold time THD:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 3
Start condition setup time TSU:STA 4700 ns 1.7V ≤ VCC < 2.5V 3
Start condition setup time TSU:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 3
Data input hold time THD:DAT 0 ns Note 2 3
Data input setup time TSU:DAT 250 ns 1.7V ≤ VCC < 2.5V 3
Data input setup time TSU:DAT 100 ns 2.5V ≤ VCC ≤ 5.5V 3
Stop condition setup time TSU:STO 4000 ns 1.7V ≤ VCC < 2.5V 3
Stop condition setup time TSU:STO 600 ns 2.5V ≤ VCC ≤ 5.5V 3
WP setup time TSU:WP 4000 ns 1.7V ≤ VCC < 2.5V 4
WP setup time TSU:WP 600 ns 2.5V ≤ VCC ≤ 5.5V 4
WP hold time THD:WP 4700 ns 1.7V ≤ VCC < 2.5V 4
WP hold time THD:WP 1300 ns 2.5V ≤ VCC ≤ 5.5V 4
Output valid from clock TAA 3500 ns 1.7V ≤ VCC < 2.5V 4
Output valid from clock TAA 900 ns 2.5V ≤ VCC ≤ 5.5V 4
Bus free time TBUF 4700 ns 1.7V ≤ VCC < 2.5V 4
Bus free time TBUF 1300 ns 2.5V ≤ VCC ≤ 5.5V 4
Input filter spike suppression (SDA and SCL pins) TSP 50 ns All except 24FC1025 (Note 1 and Note 3) 4
Write cycle time (byte or page) TWC 5 ms 4
Endurance 1e+06 cycles Page mode, 25°C, VCC = 5.5V (Note 4) 4
Page write time 3 ms typical 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin SM = Plastic SOIJ (5.28 mm Body), 8-lead SN = Plastic SOIC (3.90 mm Body), 8-lead 25

CAD (KiCad official)

  • Symbol: 24AA1025-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 24aa1025-i-etched.step / 24aa1025-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24aa1025-i.step / 24aa1025-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (28 pp, sha256 b8aab0249f8f1374, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF