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24AA02E48-I

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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24AA02E48-I

Microchip Tech · EEPROM · SOIC-8

24AA02E48-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Not connected on the 24AA02E48 (A0 address input position on the 24AA025E48); may be left floating or tied to VSS or VCC.
2 NC unconnected Not connected on the 24AA02E48 (A1 address input position on the 24AA025E48); may be left floating or tied to VSS or VCC.
3 NC unconnected Not connected on the 24AA02E48 (A2 address input position on the 24AA025E48); may be left floating or tied to VSS or VCC.
4 VSS power_in Ground.
5 SDA bidirectional Serial address/data I/O; open-drain terminal that needs a pull-up resistor to VCC (typically 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
6 SCL input Serial clock input that synchronizes data transfer to and from the device.
7 NC unconnected Not connected.
8 VCC power_in Power supply, +1.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on all inputs and outputs relative to VSS -0.3 V Relative to VSS; upper limit Vcc + 1.0V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 85 °C 3
ESD protection on all pins 4 kV 3
Supply voltage VCC (operating range) VCC 1.7 5.5 V Industrial (I) grade, TA = -40°C to +85°C 3
Ambient temperature (industrial) TA -40 85 °C VCC = +1.7V to +5.5V 3
Input high voltage (SCL, SDA, A0, A1, A2) VIH 0.7 VCC 3
Input low voltage (SCL, SDA, A0, A1, A2) VIL 0.3 VCC 3
Schmitt trigger input hysteresis VHYS 0.05 VCC 3
Low-level output voltage VOL 0.4 V IOL = 3.0 mA, VCC = 2.5V 3
Input leakage current ILI -1 1 μA VIN = VSS or VCC 3
Output leakage current ILO -1 1 μA VOUT = VSS or VCC 3
Pin capacitance (all inputs/outputs) CIN, COUT 10 pF VCC = 5.0V; TA = 25°C, FCLK = 1 MHz 3
Operating current, write ICC 0.1 3 mA VCC = 5.5V, SCL = 400 kHz 3
Operating current, read ICC 0.05 1 mA 3
Standby current ICCS 0.01 1 μA Industrial; SDA = SCL = VCC; WP = VSS 3
Clock frequency FCLK 400 kHz 2.5V ≤ VCC ≤ 5.5V 4
Clock frequency FCLK 100 kHz 1.7V ≤ VCC < 2.5V 4
Clock high time THIGH 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Clock high time THIGH 4000 ns 1.7V ≤ VCC < 2.5V 4
Clock low time TLOW 1300 ns 2.5V ≤ VCC ≤ 5.5V 4
Clock low time TLOW 4700 ns 1.7V ≤ VCC < 2.5V 4
SDA and SCL rise time TR 300 ns 2.5V ≤ VCC ≤ 5.5V (note 1) 4
SDA and SCL rise time TR 1000 ns 1.7V ≤ VCC < 2.5V (note 1) 4
SDA and SCL fall time TF 300 ns (note 1) 4
Start condition hold time THD:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Start condition hold time THD:STA 4000 ns 1.7V ≤ VCC < 2.5V 4
Start condition setup time TSU:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Start condition setup time TSU:STA 4700 ns 1.7V ≤ VCC < 2.5V 4
Data input hold time THD:DAT 0 ns (note 2) 4
Data input setup time TSU:DAT 100 ns 2.5V ≤ VCC ≤ 5.5V 4
Data input setup time TSU:DAT 250 ns 1.7V ≤ VCC < 2.5V 4
Stop condition setup time TSU:STO 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Stop condition setup time TSU:STO 4000 ns 1.7V ≤ VCC < 2.5V 4
Output valid from clock TAA 900 ns 2.5V ≤ VCC ≤ 5.5V (note 2) 4
Output valid from clock TAA 3500 ns 1.7V ≤ VCC < 2.5V (note 2) 4
Bus free time TBUF 1300 ns 2.5V ≤ VCC ≤ 5.5V 4
Bus free time TBUF 4700 ns 1.7V ≤ VCC < 2.5V 4
Output fall time from VIH min to VIL max TOF 250 ns 2.5V ≤ VCC ≤ 5.5V 4
Input filter spike suppression (SDA and SCL) TSP 50 ns (notes 1 and 3) 4
Write cycle time (byte or page) TWC 5 ms 4
Endurance (erase/write cycles) 1 M (次) 25°C (note 4) 4

CAD (KiCad official)

  • Symbol: 24AA02E48-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 24aa02e48-i-etched.step / 24aa02e48-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24aa02e48-i.step / 24aa02e48-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (28 pp, sha256 8d4faf5cd3e1177e, retrieved 2026-10-27, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF