component
23LC1024T-I
Public Made by Adomby adom
Microchip Tech SRAM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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23LC1024T-I
Microchip Tech · SRAM · TSSOP-8
23LC1024T-I from Microchip Tech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | A low level on this Chip Select input selects the device, and a high level deselects it and forces it into Standby mode. |
| 2 | SO/SIO1 | bidirectional | Serial output in SPI mode, and a bidirectional Serial I/O 1 in SDI and SQI modes, with data shifted out after the falling SCK edge and latched on the rising edge. |
| 3 | SIO2 | bidirectional | Bidirectional Serial I/O 2 used only in SQI mode, which should not be left floating when SQI is not used. |
| 4 | VSS | power_in | Ground reference pin for the device. |
| 5 | SI/SIO0 | bidirectional | Serial input in SPI mode, and a bidirectional Serial I/O 0 in SDI and SQI modes, with data latched on the rising SCK edge. |
| 6 | SCK | input | Serial clock input that synchronizes communication, rated at 20 MHz for all modes (16 MHz for E-temp). |
| 7 | HOLD/SIO3 | bidirectional | In SPI and SDI modes this HOLD input suspends serial communication when pulled low (it must be held high when unused), and it is a bidirectional Serial I/O 3 in SQI mode where HOLD is unavailable. |
| 8 | VCC | power_in | Power supply pin; the 23LC1024 operates from 2.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Ambient Temperature under Bias | TA | -40 | 125 | °C | 2 | ||
| All Inputs and Outputs w.r.t. VSS | -0.3 | V | max printed as VCC + 0.3V | 2 | |||
| VCC Supply Voltage | VCC | 2.5 | 5.5 | V | 23LC1024 | 2 | |
| Operating Ambient Temperature, Industrial (I) | TA | -40 | 85 | °C | Industrial (I) | 2 | |
| Low-level Input Voltage | VIL | 0.1 | VCC | 23LC1024 | 2 | ||
| High-level Input Voltage | VIH | 0.7 | VCC | 2 | |||
| Low-level Output Voltage | VOL | 0.2 | V | IOL = 1 mA | 2 | ||
| High-level Output Voltage | VOH | -0.5 | V | IOH = -400 A; printed as VCC - 0.5 | 2 | ||
| Input Leakage Current | ILI | -1 | 1 | µA | CS = VCC, VIN = VSS or VCC | 2 | |
| Output Leakage Current | ILO | -1 | 1 | µA | CS = VCC, VOUT = VSS or VCC | 2 | |
| Read Operating Current | ICC | 3 | 10 | mA | FCLK = 20 MHz; SO = O, 5.5V | 2 | |
| Standby Current | ICCS | 4 | 10 | µA | CS = VCC = 5.5V, Inputs tied to VCC or VSS, I-Temp | 2 | |
| Input Capacitance | CINT | 7 | pF | VCC = 5.0V, f = 1 MHz, TA = 25°C | 2 | ||
| Clock Frequency | FCLK | 20 | MHz | I-Temp | 3 | ||
| CS Setup Time | TCSS | 25 | ns | I-Temp | 3 | ||
| CS Hold Time | TCSH | 50 | ns | 3 | |||
| CS Disable Time | TCSD | 25 | ns | I-Temp | 3 | ||
| Data Setup Time | TSU | 10 | ns | 3 | |||
| Data Hold Time | THD | 10 | ns | 3 | |||
| CLK Rise Time | TR | 20 | ns | 3 | |||
| CLK Fall Time | TF | 20 | ns | 3 | |||
| Clock High Time | THI | 25 | ns | I-Temp | 3 | ||
| Clock Low Time | TLO | 25 | ns | I-Temp | 3 | ||
| Clock Delay Time | TCLD | 25 | ns | I-Temp | 3 | ||
| Output Valid from Clock Low | TV | 25 | ns | I-Temp | 3 | ||
| Output Hold Time | THO | 0 | ns | 3 | |||
| Output Disable Time | TDIS | 20 | ns | 3 | |||
| HOLD Setup Time | THS | 10 | ns | 3 | |||
| HOLD Hold Time | THH | 10 | ns | 3 | |||
| HOLD Low to Output High-Z | THZ | 10 | ns | 3 | |||
| HOLD High to Output Valid | THV | 50 | ns | 3 | |||
| RAM Data Retention Voltage | VDR | 1 | V | 2 |
CAD (KiCad official)
- Symbol:
23LC1024T-I - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
23lc1024t-i-etched.step/23lc1024t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);23lc1024t-i.step/23lc1024t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (32 pp, sha256
a43100c9e97fbdba, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 23LC1024T-I
**Microchip Tech** · SRAM · TSSOP-8
23LC1024T-I from Microchip Tech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | A low level on this Chip Select input selects the device, and a high level deselects it and forces it into Standby mode. |
| 2 | SO/SIO1 | bidirectional | Serial output in SPI mode, and a bidirectional Serial I/O 1 in SDI and SQI modes, with data shifted out after the falling SCK edge and latched on the rising edge. |
| 3 | SIO2 | bidirectional | Bidirectional Serial I/O 2 used only in SQI mode, which should not be left floating when SQI is not used. |
| 4 | VSS | power_in | Ground reference pin for the device. |
| 5 | SI/SIO0 | bidirectional | Serial input in SPI mode, and a bidirectional Serial I/O 0 in SDI and SQI modes, with data latched on the rising SCK edge. |
| 6 | SCK | input | Serial clock input that synchronizes communication, rated at 20 MHz for all modes (16 MHz for E-temp). |
| 7 | HOLD/SIO3 | bidirectional | In SPI and SDI modes this HOLD input suspends serial communication when pulled low (it must be held high when unused), and it is a bidirectional Serial I/O 3 in SQI mode where HOLD is unavailable. |
| 8 | VCC | power_in | Power supply pin; the 23LC1024 operates from 2.5 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TSTG | -65 | | 150 | °C | | 2 |
| Ambient Temperature under Bias | TA | -40 | | 125 | °C | | 2 |
| All Inputs and Outputs w.r.t. VSS | | -0.3 | | | V | max printed as VCC + 0.3V | 2 |
| VCC Supply Voltage | VCC | 2.5 | | 5.5 | V | 23LC1024 | 2 |
| Operating Ambient Temperature, Industrial (I) | TA | -40 | | 85 | °C | Industrial (I) | 2 |
| Low-level Input Voltage | VIL | | | 0.1 | VCC | 23LC1024 | 2 |
| High-level Input Voltage | VIH | 0.7 | | | VCC | | 2 |
| Low-level Output Voltage | VOL | | | 0.2 | V | IOL = 1 mA | 2 |
| High-level Output Voltage | VOH | -0.5 | | | V | IOH = -400 A; printed as VCC - 0.5 | 2 |
| Input Leakage Current | ILI | -1 | | 1 | µA | CS = VCC, VIN = VSS or VCC | 2 |
| Output Leakage Current | ILO | -1 | | 1 | µA | CS = VCC, VOUT = VSS or VCC | 2 |
| Read Operating Current | ICC | | 3 | 10 | mA | FCLK = 20 MHz; SO = O, 5.5V | 2 |
| Standby Current | ICCS | | 4 | 10 | µA | CS = VCC = 5.5V, Inputs tied to VCC or VSS, I-Temp | 2 |
| Input Capacitance | CINT | | | 7 | pF | VCC = 5.0V, f = 1 MHz, TA = 25°C | 2 |
| Clock Frequency | FCLK | | | 20 | MHz | I-Temp | 3 |
| CS Setup Time | TCSS | 25 | | | ns | I-Temp | 3 |
| CS Hold Time | TCSH | 50 | | | ns | | 3 |
| CS Disable Time | TCSD | 25 | | | ns | I-Temp | 3 |
| Data Setup Time | TSU | 10 | | | ns | | 3 |
| Data Hold Time | THD | 10 | | | ns | | 3 |
| CLK Rise Time | TR | | | 20 | ns | | 3 |
| CLK Fall Time | TF | | | 20 | ns | | 3 |
| Clock High Time | THI | 25 | | | ns | I-Temp | 3 |
| Clock Low Time | TLO | 25 | | | ns | I-Temp | 3 |
| Clock Delay Time | TCLD | 25 | | | ns | I-Temp | 3 |
| Output Valid from Clock Low | TV | | | 25 | ns | I-Temp | 3 |
| Output Hold Time | THO | 0 | | | ns | | 3 |
| Output Disable Time | TDIS | | | 20 | ns | | 3 |
| HOLD Setup Time | THS | 10 | | | ns | | 3 |
| HOLD Hold Time | THH | 10 | | | ns | | 3 |
| HOLD Low to Output High-Z | THZ | 10 | | | ns | | 3 |
| HOLD High to Output Valid | THV | | | 50 | ns | | 3 |
| RAM Data Retention Voltage | VDR | | 1 | | V | | 2 |
## CAD (KiCad official)
- Symbol: `23LC1024T-I`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `23lc1024t-i-etched.step` / `23lc1024t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `23lc1024t-i.step` / `23lc1024t-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588931634687053824) (32 pp, sha256 `a43100c9e97fbdba`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/23lc1024t-i-datasheet.pdf)