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Contents

README

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20P09L

HL · MOSFETs · SOT-23-3L

20P09L from HL, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage limited to ±12V, with a threshold of -0.4V to -1V (typ. -0.65V) at ID = -250μA.
2 S passive Source of the P-channel MOSFET; the drain-to-source voltage is rated -20V and the continuous drain current -9A at TC = 25°C.
3 D passive Drain of the P-channel MOSFET; the drain-to-source voltage is rated -20V and the pulsed drain current -66A.

Key specifications

Parameter Value
Manufacturer HL
Package SOT-23-3L
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: 20P09L
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: 20p09l-etched.step / 20p09l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 20p09l.step / 20p09l.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HL datasheet (6 pp, sha256 56a18c4731204e87, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF