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1EDB6275FXUMA1

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Infineon Technologies Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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1EDB6275FXUMA1

Infineon Technologies · Gate Drivers · SOIC-8

1EDB6275FXUMA1 from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDI power_in Input-side supply voltage, 3 V to 15 V, with a ceramic bypass capacitor of at least 100 nF recommended to GNDI.
2 IN+ input Non-inverting driver input (active high); if IN+ is low or left open, OUT_SNK is low.
3 IN- input Inverting driver input (active low); if IN- is high or left open, OUT_SNK is low.
4 GNDI power_in Input-side ground reference.
5 VDDO power_in Output-side supply voltage, up to 20 V (12.8 V to 20 V operating range for 1EDB6275F).
6 OUT_SRC output Driver output source, low-impedance switch to VDDO.
7 OUT_SNK output Driver output sink, low-impedance switch to GNDO.
8 GNDO power_in Output-side ground reference.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply voltage VDDI -0.3 17 V 8
Output supply voltage VDDO -0.3 22 V 8
Voltage at pins IN+, IN- VIN -0.3 17 V 8
Voltage at pins IN+, IN- (transient) VIN -5 V transient for 50 ns 8
Voltage at pin OUT_SNK VOUT_SNK -0.3 24 V OUT = high, DC 8
Voltage at pin OUT_SNK (transient) VOUT_SNK -2 24 V OUT = high, transient for 200 ns 8
Reverse current peak at pin OUT_SRC ISRC_rev -5 Apk transient for 500 ns 8
Reverse current peak at pin OUT_SNK ISNK_rev 5 Apk transient for 500 ns 8
Junction temperature TJ -40 150 °C 8
Storage temperature TSTG -55 150 °C 8
Soldering temperature TSOL 260 °C reflow / wave soldering 8
ESD capability CDM VESD_CDM 0.5 kV Charged Device Model (CDM) 8
ESD capability HBM VESD_HBM 2 kV Human Body Model (HBM) 8
Input supply voltage VDDI 3 15 V Min. defined by UVLO 9
Output supply voltage VDDO 12.8 20 V for 1EDB6275F 9
Logic input voltage at pins IN+, IN- VIN -0.3 15 V 9
Junction temperature TJ -40 150 °C continuous operation above 125°C may reduce lifetime 9
Ambient temperature TA -40 125 °C 9
IVDDI quiescent current IVDDIq 0.85 1 mA no switching 10
IVDDO quiescent current IVDDOq 0.72 1 mA OUT = low, no switching, VDDO = 18 V 10
UVLO turn-on threshold VDDI UVLOVDDI,on 2.7 2.85 3 V 10
UVLO turn-off threshold VDDI UVLOVDDI,off 2.65 V 10
UVLO threshold hysteresis VDDI UVLOVDDI,hys 0.15 0.2 0.25 V 10
UVLO turn on threshold VDDO UVLOVDDO,on 11.7 12.2 12.7 V 1EDB6275F (12 V UVLO option) 11
UVLO turn off threshold VDDO UVLOVDDO,off 11.5 V 1EDB6275F (12 V UVLO option) 11
UVLO threshold hysteresis VDDO UVLOVDDO,hys 0.5 0.7 0.9 V 1EDB6275F (12 V UVLO option) 11
Input voltage threshold for transition LH VINH 1.9 2.2 2.5 V 11
Input voltage threshold for transition HL VINL 1 1.3 1.6 V 11
Input voltage threshold hysteresis VIN_hys 0.9 V 11
High-level input leakage current at pin IN+ IIN+,H 40 70 µA IN+ tied to VDDI 11
Low-level input leakage current at pin IN- IIN-,L -55 -40 µA IN- tied to GNDI 12
Input pull-down resistor RIN,PD 75 kΩ 12
Input pull-up resistor RIN,PU 75 kΩ 12
High-level (sourcing) output resistance Ron_SRC 0.52 0.95 1.7 Ω ISNK = 50 mA 12
Low-level (sinking) output resistance Ron_SNK 0.31 0.48 0.88 Ω ISRC = 50 mA 12
Peak sourcing output current ISRC_pk 6 A VDDO = 18 V, VOUT = 0 V 12
Peak sinking output current ISNK_pk -10 A VOUT = VDDO = 18 V 12
IN+/IN- to output propagation delay tPDon, tPDoff 41 45 51 ns see Figure 4 12
Part-to-part skew (on) ΔtPDon,p-p 2 ns 12
Part-to-part skew (off) ΔtPDoff,p-p 2 ns 12
Pulse width distortion tPWD 2 ns see Figure 5 12
Rise time trise 8.3 16 ns VDDO = 18 V, CLOAD = 1.8 nF 12
Fall time tfall 5 9 ns VDDO = 18 V, CLOAD = 1.8 nF 13
Minimum input pulse width that changes output state tPW 15 19 23 ns see Figure 7 13
Input-side start-up time tSTART,VDDI 3 µs see Figure 8 13
Input-side deactivation time tSTOP,VDDI 300 ns see Figure 8 13
Output-side start-up time tSTART,VDDO 5 µs see Figure 9 13
Output-side deactivation time tSTOP,VDDO 125 ns see Figure 9 13
Activation time of output clamping in UVLO condition tCLAMP,OUT 20 ns see Figure 10 13
Static CMTI high /CMStatic,H/ 300 V/ns VCM = 1500 V; IN- tied to GNDI, IN+ tied to VDDI (logic high inputs) 13
Static CMTI low /CMStatic,L/ 300 V/ns VCM = 1500 V; IN- tied to GNDI, IN+ tied to GNDI (logic low inputs) 13
Dynamic CMTI /CMDynamic/ 300 V/ns VCM = 1500 V; IN- tied to GNDI, dynamic IN+ (10 MHz square wave) 13
Thermal resistance junction-ambient RthJA25 116 K/W 200mW output power 9
Thermal resistance junction-case (top) RthJC25 54 K/W 9
Thermal resistance junction-board RthJB25 45 K/W 9
Characterization parameter junction-top ΨthJT25 9 K/W 9
Characterization parameter junction-board ΨthJB25 36 K/W 9

CAD (KiCad official)

  • Symbol: 1EDB6275FXUMA1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 1edb6275fxuma1-etched.step / 1edb6275fxuma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 1edb6275fxuma1.step / 1edb6275fxuma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (33 pp, sha256 1733e5e06d212c5b, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF