# 1ED44173N01BXTSA1

**Infineon Technologies** · Gate Drivers · SOT-23-6

1ED44173N01BXTSA1 from Infineon Technologies, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OCP | input | Current sense input that senses the negative voltage drop across the system sense resistor, with an over-current threshold VOCTH of -246 mV typ (range -259 mV to -233 mV) and an absolute minimum of -10 V. |
| 2 | COM | power_in | Ground reference; all voltage parameters of the device are referenced to COM. |
| 3 | OUT | output | Gate drive output for the external MOSFET, with typical pulsed sourcing and sinking current of 2.6 A (PW ≤ 2 µs). |
| 4 | VCC | power_in | Supply voltage with a recommended range of 8.6 V to 20 V and an absolute maximum of 25 V referenced to COM; internal UVLO holds OUT low when VCC is below the threshold. |
| 5 | EN/FLT | bidirectional | Enable input, negative-logic open-drain fault output, and fault clear time programming pin: the output is enabled when the pin is above VENH (2.1 V typ) and disabled when below VENL (1.0 V typ), and it is pulled internally low during a fault. |
| 6 | IN | input | Logic input for the gate driver output, in phase with OUT, with VINH typ 2.1 V and VINL typ 1.0 V; the output is held low when the input is floating. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOT-23-6 |
| Category | Motor Driver ICs |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Fixed supply voltage | VCC | -0.3 |  | 25 | V |  | 7 |
| Output voltage (OUT) | VO | -0.3 |  |  | V |  | 7 |
| Voltage at current sense pin (OCP) | VOCP | -10 |  |  | V |  | 7 |
| Voltage at enable and fault reporting pin (EN/FLT) | VEN/FLT | -0.3 |  |  | V |  | 7 |
| Logic input voltage (IN) | VIN | -10 |  |  | V |  | 7 |
| Package power dissipation PG-SOT23-6 | PD |  |  | 0.5 | W | TA ≤ 25°C | 7 |
| Thermal resistance, junction to ambient | RthJA |  |  | 250 | °C/W |  | 7 |
| Junction temperature | TJ | -40 |  | 150 | °C |  | 7 |
| Storage temperature | TS | -55 |  | 150 | °C |  | 7 |
| Lead temperature (soldering, 10 seconds) | TL |  |  | 260 | °C | soldering, 10 seconds | 7 |
| Fixed supply voltage | VCC | 8.6 |  | 20 | V |  | 7 |
| Voltage at current sense pin (OCP) | VOCP | -5 |  |  | V |  | 7 |
| Voltage at enable and fault reporting pin (EN/FLT) | VEN/FLT | 0 |  |  | V |  | 7 |
| Logic input voltage (IN) | VIN | -5 |  |  | V |  | 7 |
| Ambient temperature | TA | -40 |  | 125 | °C |  | 7 |
| VCC supply undervoltage positive going threshold | VCCUV+ | 7.4 | 8 | 8.6 | V |  | 8 |
| VCC supply undervoltage negative going threshold | VCCUV- | 6.7 | 7.3 | 7.8 | V |  | 8 |
| Logic 0 input voltage (OUT = LO) | VINL | 0.8 | 1 | 1.2 | V |  | 8 |
| Logic 1 input voltage (OUT = HI) | VINH | 1.9 | 2.1 | 2.3 | V |  | 8 |
| Logic 0 disable voltage | VENL | 0.8 | 1 | 1.2 | V |  | 8 |
| Logic 1 enable voltage | VENH | 1.9 | 2.1 | 2.3 | V |  | 8 |
| High level output voltage, VCC - VOUT | VOH |  | 0.02 | 0.1 | V | IO = 2 mA | 8 |
| Low level output voltage, VOUT | VOL |  | 0.02 | 0.1 | V | IO = 2 mA | 8 |
| Current limit threshold voltage | VOCTH | -259 | -246 | -233 | mV |  | 8 |
| Logic 1 input bias current, IN pin | IIN+ | 35 | 50 | 70 | µA | VIN = 5 V | 8 |
| Logic 0 input bias current, IN pin | IIN- | -10 |  | -6 | µA | VIN = 0 V | 8 |
| Quiescent VCC supply current | IQCC |  | 700 | 1200 | µA | VIN = 0 V or 5 V | 8 |
| Output sourcing short circuit pulsed current | IO+ | 2 | 2.6 |  | A | VO = 0 V, PW ≤ 2 µs | 8 |
| Output sinking short circuit pulsed current | IO- | 2 | 2.6 |  | A | VO = 15 V, PW ≤ 2 µs | 8 |
| EN/FLT pull down sinking current | IFLT | 18 |  |  | mA | VEN/FLT = 0.4 V | 8 |
| Active shut down voltage | VACTSD |  | 2 | 2.3 | V | VCC = open, IOUT-/IO- = 0.1 | 8 |
| Turn-on propagation delay | ton | 27 | 34 | 45 | ns | Figure 6; VIN pulse = 5 V | 8 |
| Turn-off propagation delay | toff | 27 | 34 | 45 | ns | Figure 6; VIN pulse = 5 V | 8 |
| Disable propagation delay | tDISA | 27 | 34 | 45 | ns | Figure 12; VEN pulse = 5 V | 8 |
| Over current protection propagation delay | tOCPDEL |  | 97 | 140 | ns | Figure 9, Figure 10; REN = 10 kΩ to VCC; VOCP pulse = -0.5 V | 8 |
| OCP to low level EN/FLT signal delay | tOCPFLT |  | 97 | 150 | ns | REN = 10 kΩ to VCC; VOCP pulse = -0.5 V | 8 |
| FAULT clear time | tFLTC | 80 | 103 | 130 | µs | Figure 9, Figure 10; Vdd = 3.3 V; RFLTC = 1MΩ to Vdd, CFLTC = 150pF to COM | 8 |
| Over current protection blanking time | tBLK | 30 | 50 | 80 | ns | RFLT = 0 Ω, CFLT = NC; VOCP pulse = -0.5 V | 8 |

## CAD (KiCad official)

- Symbol: `1ED44173N01BXTSA1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `1ed44173n01bxtsa1-etched.step` / `1ed44173n01bxtsa1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `1ed44173n01bxtsa1.step` / `1ed44173n01bxtsa1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589031728010289152) (20 pp, sha256 `335b817ae7f3547b`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/1ed44173n01bxtsa1-datasheet.pdf)