component
π162M61
Public Made by Adomby adom
2Pai Semi Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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π162M61
2Pai Semi · Digital Isolators · SOIC-16-300mil
π162M61 from 2Pai Semi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypassed to GND1 with 0.1 µF to 10 µF. |
| 2 | VIA | input | Logic input A on side 1. |
| 3 | VIB | input | Logic input B on side 1. |
| 4 | VIC | input | Logic input C on side 1. |
| 5 | VID | input | Logic input D on side 1. |
| 6 | VOE | output | Logic output E on side 1. |
| 7 | VOF | output | Logic output F on side 1. |
| 8 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 10 | VIF | input | Logic input F on side 2. |
| 11 | VIE | input | Logic input E on side 2. |
| 12 | VOD | output | Logic output D on side 2. |
| 13 | VOC | output | Logic output C on side 2. |
| 14 | VOB | output | Logic output B on side 2. |
| 15 | VOA | output | Logic output A on side 2. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypassed to GND2 with 0.1 µF to 10 µF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 2Pai Semi |
| Package | SOIC-16-300mil |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (abs max) | VDD1-GND1, VDD2-GND2 | -0.5 | 7 | V | TA=25°C | 4 | |
| Average Output Current per Pin, Side 1 | IO1 | -10 | 10 | mA | 4 | ||
| Average Output Current per Pin, Side 2 | IO2 | -10 | 10 | mA | 4 | ||
| Common-Mode Transients Immunity (abs max) | -200 | 200 | kV/µs | 4 | |||
| Storage Temperature | TST | -65 | 150 | °C | 4 | ||
| Ambient Operating Temperature (abs max) | TA | -40 | 125 | °C | 4 | ||
| Supply Voltage | VDDx | 3 | 5.5 | V | 4 | ||
| High Level Output Current | IOH | -6 | mA | 4 | |||
| Low Level Output Current | IOL | 6 | mA | 4 | |||
| Data Rate | 0 | 10 | Mbps | 4 | |||
| Junction Temperature | TJ | -40 | 150 | °C | 4 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 4 | ||
| Minimum Pulse Width | PW | 100 | ns | Within pulse width distortion (PWD) limit | 5 | ||
| Maximum Data Rate | 10 | Mbps | Within PWD limit | 5 | |||
| Propagation Delay Time | tpHL, tpLH | 12 | 16 | ns | 5VDC supply | 6 | |
| Propagation Delay Time | tpHL, tpLH | 14 | 18.5 | ns | 3.3VDC supply | 6 | |
| Pulse Width Distortion | PWD | 0.3 | 3 | ns | 5VDC supply, /tpHL - tpLH/ | 6 | |
| Pulse Width Distortion | PWD | 0.4 | 3 | ns | 3.3VDC supply, /tpHL - tpLH/ | 6 | |
| Part to Part Propagation Delay Skew | tPSK | 2 | ns | 5VDC supply | 6 | ||
| Channel to Channel Propagation Delay Skew | tCSK | 0 | 1.8 | ns | 5VDC supply | 6 | |
| Channel to Channel Propagation Delay Skew | tCSK | 0 | 2 | ns | 3.3VDC supply | 6 | |
| Output Signal Rise/Fall Time | tr/tf | 1.5 | ns | See Figure 11 | 6 | ||
| Dynamic Input Supply Current per Channel | IDDI (D) | 10 | µA/Mbps | CL = 0 pF @ 5VDC Supply | 6 | ||
| Dynamic Output Supply Current per Channel | IDDO (D) | 45 | µA/Mbps | CL = 0 pF @ 5VDC Supply | 6 | ||
| Dynamic Input Supply Current per Channel | IDDI (D) | 9 | µA/Mbps | CL = 0 pF @ 3.3VDC Supply | 6 | ||
| Dynamic Output Supply Current per Channel | IDDO (D) | 28 | µA/Mbps | CL = 0 pF @ 3.3VDC Supply | 6 | ||
| Common-Mode Transient Immunity | CMTI | 120 | kV/µs | VIN = VDDx or 0V, VCM = 1000 V | 6 | ||
| Jitter (peak-to-peak) | 180 | ps p-p | See the Jitter Measurement section | 6 | |||
| Jitter (rms) | 30 | ps rms | See the Jitter Measurement section | 6 | |||
| ESD (HBM) | ESD | -8 | 8 | kV | 6 | ||
| Low Level Output Voltage | VOL | 0 | 0.1 | V | 20 µA output current | 6 | |
| Low Level Output Voltage | VOL | 0.1 | 0.2 | V | 2 mA output current | 6 | |
| Input Current per Signal Channel | IIN | -10 | 0.5 | 10 | µA | 0 V ≤ Signal voltage ≤ VDDX | 6 |
| VDDx Undervoltage Rising Threshold | VDDxUV+ | 2.45 | 2.75 | 2.95 | V | 6 | |
| VDDx Undervoltage Falling Threshold | VDDxUV− | 2.3 | 2.6 | 2.75 | V | 7 | |
| VDDx Hysteresis | VDDxUVH | 0.15 | V | 7 | |||
| Quiescent Supply Current IDD1 | IDD1 (Q) | 0.92 | 1.15 | 1.5 | mA | 5VDC, VI=0V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.69 | 2.12 | 2.75 | mA | 5VDC, VI=5V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 1.22 | 1.53 | 1.99 | mA | 5VDC, VI=5V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.64 | 2.06 | 2.67 | mA | 5VDC, VI=0V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 0.89 | 1.11 | 1.44 | mA | 3.3VDC, VI=0V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.64 | 2.05 | 2.66 | mA | 3.3VDC, VI=3.3V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 1.03 | 1.29 | 1.68 | mA | 3.3VDC, VI=3.3V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.55 | 1.94 | 2.52 | mA | 3.3VDC, VI=0V for π16xMx1 | 8 |
| Total Supply Current IDD1 at 150 Kbps | IDD1 | 1.31 | 1.97 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 150 Kbps | IDD2 | 2.14 | 3.21 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD1 at 1 Mbps | IDD1 | 1.5 | 2.26 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 1 Mbps | IDD2 | 2.37 | 3.55 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD1 at 10 Mbps | IDD1 | 2.99 | 4.48 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 10 Mbps | IDD2 | 4.23 | 6.35 | mA | 5VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD1 at 150 Kbps | IDD1 | 1.19 | 1.79 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 150 Kbps | IDD2 | 2.04 | 3.06 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD1 at 1 Mbps | IDD1 | 1.3 | 1.94 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 1 Mbps | IDD2 | 2.17 | 3.26 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD1 at 10 Mbps | IDD1 | 2.23 | 3.34 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Total Supply Current IDD2 at 10 Mbps | IDD2 | 3.36 | 5.04 | mA | 3.3VDC, CL = 0 pF | 9 | |
| Rated Dielectric Insulation Voltage | 5000 | V rms | 1-minute duration | 9 | |||
| Minimum External Air Gap (Clearance) | L (CLR) | 8 | mm | Measured from input terminals to output terminals, shortest distance through air | 9 | ||
| Minimum External Tracking (Creepage) | L (CRP) | 8 | mm | Measured from input terminals to output terminals, shortest distance path along body | 9 | ||
| IC Junction to Ambient Thermal Resistance | θJA | 45 | °C/W | Thermocouple located at center of package underside | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN V VDE V 0884-11, eachπ160M3x/π161M3x/π162M3x /π163M3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); e | 10 |
CAD (KiCad official)
- Symbol:
π162M61 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
162m61-etched.step/162m61-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);162m61.step/162m61.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 2Pai Semi datasheet (19 pp, sha256
5bda2a660ddaeeda, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# π162M61
**2Pai Semi** · Digital Isolators · SOIC-16-300mil
π162M61 from 2Pai Semi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypassed to GND1 with 0.1 µF to 10 µF. |
| 2 | VIA | input | Logic input A on side 1. |
| 3 | VIB | input | Logic input B on side 1. |
| 4 | VIC | input | Logic input C on side 1. |
| 5 | VID | input | Logic input D on side 1. |
| 6 | VOE | output | Logic output E on side 1. |
| 7 | VOF | output | Logic output F on side 1. |
| 8 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 10 | VIF | input | Logic input F on side 2. |
| 11 | VIE | input | Logic input E on side 2. |
| 12 | VOD | output | Logic output D on side 2. |
| 13 | VOC | output | Logic output C on side 2. |
| 14 | VOB | output | Logic output B on side 2. |
| 15 | VOA | output | Logic output A on side 2. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypassed to GND2 with 0.1 µF to 10 µF. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 2Pai Semi |
| Package | SOIC-16-300mil |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (abs max) | VDD1-GND1, VDD2-GND2 | -0.5 | | 7 | V | TA=25°C | 4 |
| Average Output Current per Pin, Side 1 | IO1 | -10 | | 10 | mA | | 4 |
| Average Output Current per Pin, Side 2 | IO2 | -10 | | 10 | mA | | 4 |
| Common-Mode Transients Immunity (abs max) | | -200 | | 200 | kV/µs | | 4 |
| Storage Temperature | TST | -65 | | 150 | °C | | 4 |
| Ambient Operating Temperature (abs max) | TA | -40 | | 125 | °C | | 4 |
| Supply Voltage | VDDx | 3 | | 5.5 | V | | 4 |
| High Level Output Current | IOH | -6 | | | mA | | 4 |
| Low Level Output Current | IOL | | | 6 | mA | | 4 |
| Data Rate | | 0 | | 10 | Mbps | | 4 |
| Junction Temperature | TJ | -40 | | 150 | °C | | 4 |
| Ambient Operating Temperature | TA | -40 | | 125 | °C | | 4 |
| Minimum Pulse Width | PW | | | 100 | ns | Within pulse width distortion (PWD) limit | 5 |
| Maximum Data Rate | | | | 10 | Mbps | Within PWD limit | 5 |
| Propagation Delay Time | tpHL, tpLH | | 12 | 16 | ns | 5VDC supply | 6 |
| Propagation Delay Time | tpHL, tpLH | | 14 | 18.5 | ns | 3.3VDC supply | 6 |
| Pulse Width Distortion | PWD | | 0.3 | 3 | ns | 5VDC supply, /tpHL - tpLH/ | 6 |
| Pulse Width Distortion | PWD | | 0.4 | 3 | ns | 3.3VDC supply, /tpHL - tpLH/ | 6 |
| Part to Part Propagation Delay Skew | tPSK | | | 2 | ns | 5VDC supply | 6 |
| Channel to Channel Propagation Delay Skew | tCSK | | 0 | 1.8 | ns | 5VDC supply | 6 |
| Channel to Channel Propagation Delay Skew | tCSK | | 0 | 2 | ns | 3.3VDC supply | 6 |
| Output Signal Rise/Fall Time | tr/tf | | 1.5 | | ns | See Figure 11 | 6 |
| Dynamic Input Supply Current per Channel | IDDI (D) | | 10 | | µA/Mbps | CL = 0 pF @ 5VDC Supply | 6 |
| Dynamic Output Supply Current per Channel | IDDO (D) | | 45 | | µA/Mbps | CL = 0 pF @ 5VDC Supply | 6 |
| Dynamic Input Supply Current per Channel | IDDI (D) | | 9 | | µA/Mbps | CL = 0 pF @ 3.3VDC Supply | 6 |
| Dynamic Output Supply Current per Channel | IDDO (D) | | 28 | | µA/Mbps | CL = 0 pF @ 3.3VDC Supply | 6 |
| Common-Mode Transient Immunity | CMTI | | 120 | | kV/µs | VIN = VDDx or 0V, VCM = 1000 V | 6 |
| Jitter (peak-to-peak) | | | 180 | | ps p-p | See the Jitter Measurement section | 6 |
| Jitter (rms) | | | 30 | | ps rms | See the Jitter Measurement section | 6 |
| ESD (HBM) | ESD | -8 | | 8 | kV | | 6 |
| Low Level Output Voltage | VOL | 0 | | 0.1 | V | 20 µA output current | 6 |
| Low Level Output Voltage | VOL | | 0.1 | 0.2 | V | 2 mA output current | 6 |
| Input Current per Signal Channel | IIN | -10 | 0.5 | 10 | µA | 0 V ≤ Signal voltage ≤ VDDX | 6 |
| VDDx Undervoltage Rising Threshold | VDDxUV+ | 2.45 | 2.75 | 2.95 | V | | 6 |
| VDDx Undervoltage Falling Threshold | VDDxUV− | 2.3 | 2.6 | 2.75 | V | | 7 |
| VDDx Hysteresis | VDDxUVH | | 0.15 | | V | | 7 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 0.92 | 1.15 | 1.5 | mA | 5VDC, VI=0V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.69 | 2.12 | 2.75 | mA | 5VDC, VI=5V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 1.22 | 1.53 | 1.99 | mA | 5VDC, VI=5V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.64 | 2.06 | 2.67 | mA | 5VDC, VI=0V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 0.89 | 1.11 | 1.44 | mA | 3.3VDC, VI=0V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.64 | 2.05 | 2.66 | mA | 3.3VDC, VI=3.3V for π16xMx1 | 8 |
| Quiescent Supply Current IDD1 | IDD1 (Q) | 1.03 | 1.29 | 1.68 | mA | 3.3VDC, VI=3.3V for π16xMx0 | 8 |
| Quiescent Supply Current IDD2 | IDD2 (Q) | 1.55 | 1.94 | 2.52 | mA | 3.3VDC, VI=0V for π16xMx1 | 8 |
| Total Supply Current IDD1 at 150 Kbps | IDD1 | | 1.31 | 1.97 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 150 Kbps | IDD2 | | 2.14 | 3.21 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD1 at 1 Mbps | IDD1 | | 1.5 | 2.26 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 1 Mbps | IDD2 | | 2.37 | 3.55 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD1 at 10 Mbps | IDD1 | | 2.99 | 4.48 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 10 Mbps | IDD2 | | 4.23 | 6.35 | mA | 5VDC, CL = 0 pF | 9 |
| Total Supply Current IDD1 at 150 Kbps | IDD1 | | 1.19 | 1.79 | mA | 3.3VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 150 Kbps | IDD2 | | 2.04 | 3.06 | mA | 3.3VDC, CL = 0 pF | 9 |
| Total Supply Current IDD1 at 1 Mbps | IDD1 | | 1.3 | 1.94 | mA | 3.3VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 1 Mbps | IDD2 | | 2.17 | 3.26 | mA | 3.3VDC, CL = 0 pF | 9 |
| Total Supply Current IDD1 at 10 Mbps | IDD1 | | 2.23 | 3.34 | mA | 3.3VDC, CL = 0 pF | 9 |
| Total Supply Current IDD2 at 10 Mbps | IDD2 | | 3.36 | 5.04 | mA | 3.3VDC, CL = 0 pF | 9 |
| Rated Dielectric Insulation Voltage | | | 5000 | | V rms | 1-minute duration | 9 |
| Minimum External Air Gap (Clearance) | L (CLR) | 8 | | | mm | Measured from input terminals to output terminals, shortest distance through air | 9 |
| Minimum External Tracking (Creepage) | L (CRP) | 8 | | | mm | Measured from input terminals to output terminals, shortest distance path along body | 9 |
| IC Junction to Ambient Thermal Resistance | θJA | | 45 | | °C/W | Thermocouple located at center of package underside | 9 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | | In accordance with DIN V VDE V 0884-11, eachπ160M3x/π161M3x/π162M3x /π163M3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); e | 10 |
## CAD (KiCad official)
- Symbol: `π162M61`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files: `162m61-etched.step` / `162m61-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `162m61.step` / `162m61.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [2Pai Semi datasheet](docs/162m61-datasheet.pdf) (19 pp, sha256 `5bda2a660ddaeeda`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/162m61-datasheet.pdf)