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π162M31

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2Pai Semi Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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π162M31

2Pai Semi · Digital Isolators · SOIC-16

π162M31 from 2Pai Semi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, which operates from 3.0 V to 5.5 V.
2 VIA input Logic input A on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
3 VIB input Logic input B on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
4 VIC input Logic input C on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
5 VID input Logic input D on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
6 VOE output Logic output E on side 2, driven from the isolated copy of input E.
7 VOF output Logic output F on side 2, driven from the isolated copy of input F.
8 GND1 power_in Ground 1, the ground reference for isolator side 1.
9 GND2 power_in Ground 2, the ground reference for isolator side 2.
10 VIF input Logic input F on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
11 VIE input Logic input E on side 1; high-level input requires at least 0.7VDDx and low-level input is 0 to 0.3VDDx per the recommended operating conditions.
12 VOD output Logic output D on side 2, driven from the isolated copy of input D.
13 VOC output Logic output C on side 2, driven from the isolated copy of input C.
14 VOB output Logic output B on side 2, driven from the isolated copy of input B.
15 VOA output Logic output A on side 2, driven from the isolated copy of input A.
16 VDD2 power_in Supply voltage for isolator side 2, which operates from 3.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-16
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltages (VDD1-GND1, VDD2-GND2) -0.5 7 V 4
Input Voltages (VIA, VIB) -0.5 V 4
Output Voltages (VOA, VOB) -0.5 V 4
Average Output Current per Pin, Side 1 IO1 -10 10 mA 4
Average Output Current per Pin, Side 2 IO2 -10 10 mA 4
Common-Mode Transients Immunity -150 150 kV/µs 4
Storage Temperature Range TST -65 150 °C 4
Ambient Operating Temperature Range (absolute maximum) TA -40 125 °C 4
Supply Voltage VDDx 3 5.5 V 4
Low Level Input Signal Voltage VIL 0 V 4
High Level Output Current IOH -6 mA 4
Low Level Output Current IOL 6 mA 4
Maximum Data Rate (recommended) 0 10 Mbps 4
Junction Temperature TJ -40 150 °C 4
Ambient Operating Temperature (recommended) TA -40 125 °C 4
Minimum Pulse Width PW 100 ns Within pulse width distortion (PWD) limit 5
Maximum Data Rate (switching) 10 Mbps Within PWD limit 5
Propagation Delay Time (tpHL, tpLH) tpHL, tpLH 5.5 8 12.5 ns 50% @ 5VDC supply 5
Propagation Delay Time (tpHL, tpLH) tpHL, tpLH 6.5 9 13.5 ns 50% @ 3.3VDC supply 5
Pulse Width Distortion PWD 0 0.3 0.8 ns /tpHL - tpLH/ @ 5VDC supply 5
Part to Part Propagation Delay Skew tPSK 1 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 1 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 0.8 ns @ 3.3VDC supply 5
ESD (HBM) ESD -8 8 kV Human body model, all pins 5
Undervoltage Rising Threshold (VDDx1) VDDxUV+ 2.45 2.65 2.9 V 6
Undervoltage Falling Threshold (VDDx1) VDDxUV- 2.3 2.5 2.75 V 6
Low Level Output Voltage VOL 0 0.1 V 20 µA output current 6
Low Level Output Voltage VOL 0.1 0.2 V 2 mA output current 6
Input Current per Signal Channel IIN -10 0.5 10 µA 0 V ≤ Signal voltage ≤ VDDX1 6
Quiescent Supply Current IDD1 (π162Mxx) IDD1 (Q) 902 1128 1466 µA @ 5VDC supply, 0V input signal 6
Quiescent Supply Current IDD2 (π162Mxx) IDD2 (Q) 1619 2024 2631 µA @ 5VDC supply, 0V input signal 6
Quiescent Supply Current IDD1 (π162Mxx) IDD1 (Q) 1030 1287 1673 µA @ 5VDC supply, 5V input signal 6
Quiescent Supply Current IDD2 (π162Mxx) IDD2 (Q) 1610 2013 2617 µA @ 5VDC supply, 5V input signal 6
Quiescent Supply Current IDD1 (π162Mxx) IDD1 (Q) 892 1115 1450 µA @ 3.3VDC supply, 0V input signal 6
Quiescent Supply Current IDD2 (π162Mxx) IDD2 (Q) 1601 2001 2601 µA @ 3.3VDC supply, 0V input signal 6
Quiescent Supply Current IDD1 (π162Mxx) IDD1 (Q) 932 1165 1515 µA @ 3.3VDC supply, 3.3V input signal 6
Quiescent Supply Current IDD2 (π162Mxx) IDD2 (Q) 1525 1906 2478 µA @ 3.3VDC supply, 3.3V input signal 7
Total Supply Current IDD1 (150 kbps) IDD1 1.83 mA @ 5VDC supply, 150 Kbps, CL = 0 pF 6
Total Supply Current IDD1 (1 Mbps) IDD1 1.97 mA @ 5VDC supply, 1 Mbps, CL = 0 pF 6
Total Supply Current IDD1 (10 Mbps) IDD1 3.27 mA @ 5VDC supply, 10 Mbps, CL = 0 pF 6
Total Supply Current IDD2 (150 kbps) IDD2 3.05 mA @ 5VDC supply, 150 Kbps, CL = 0 pF 6
Total Supply Current IDD2 (1 Mbps) IDD2 3.27 mA @ 5VDC supply, 1 Mbps, CL = 0 pF 6
Total Supply Current IDD2 (10 Mbps) IDD2 5.55 mA @ 5VDC supply, 10 Mbps, CL = 0 pF 6
Total Supply Current IDD1 (150 kbps) IDD1 1.73 mA @ 3.3VDC supply, 150 Kbps, CL = 0 pF 6
Total Supply Current IDD1 (1 Mbps) IDD1 1.8 mA @ 3.3VDC supply, 1 Mbps, CL = 0 pF 6
Total Supply Current IDD1 (10 Mbps) IDD1 2.58 mA @ 3.3VDC supply, 10 Mbps, CL = 0 pF 6
Total Supply Current IDD2 (150 kbps) IDD2 2.96 mA @ 3.3VDC supply, 150 Kbps, CL = 0 pF 6
Total Supply Current IDD2 (1 Mbps) IDD2 3.08 mA @ 3.3VDC supply, 1 Mbps, CL = 0 pF 6
Total Supply Current IDD2 (10 Mbps) IDD2 4.46 mA @ 3.3VDC supply, 10 Mbps, CL = 0 pF 6
Minimum External Air Gap (Clearance) L (CLR) 4 mm Measured from input terminals to output terminals, shortest distance through air 7
Minimum External Tracking (Creepage) L (CRP) 4 mm Measured from input terminals to output terminals, shortest distance path along body 7
Minimum Internal Gap (Internal Clearance) 11 µm Insulation distance through insulation 7
Tracking Resistance (Comparative Tracking Index) CTI 400 V DIN IEC 112/VDE 0303 Part 1 7
IC Junction to Ambient Thermal Resistance θJA 76 °C/W Thermocouple located at center of package underside 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-10, eachπ160M3x/π161M3x/π162M3x /π163M3x is proof tested by applying an insulation test voltage ≥ 1326 V peak for 1 sec (partial discharge detection limit = 5 pC); 8

CAD (KiCad official)

  • Symbol: π162M31
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 162m31-etched.step / 162m31-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 162m31.step / 162m31.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (16 pp, sha256 eb9bf6fa18d0ab5a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF