component
π140U30
Public Made by Adomby adom
2Pai Semi Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownπ140U30
2Pai Semi · Digital Isolators · SOIC-16
π140U30 from 2Pai Semi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, operating range 3.0 V to 5.5 V. |
| 2 | GND1 | power_in | Ground reference for isolator side 1. |
| 3 | VIA | input | Logic input A on side 1. |
| 4 | VIB | input | Logic input B on side 1. |
| 5 | VIC | input | Logic input C on side 1. |
| 6 | VID | input | Logic input D on side 1. |
| 7 | NC | unconnected | No connect. |
| 8 | GND1 | power_in | Ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground reference for isolator side 2. |
| 10 | NC | unconnected | No connect for π140U3X (this pin is the output enable EN2 only on π140U6X). |
| 11 | VOD | output | Logic output D on side 2. |
| 12 | VOC | output | Logic output C on side 2. |
| 13 | VOB | output | Logic output B on side 2. |
| 14 | VOA | output | Logic output A on side 2. |
| 15 | GND2 | power_in | Ground reference for isolator side 2. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, operating range 3.0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 2Pai Semi |
| Package | SOIC-16 |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (absolute max) | VDDx | -0.5 | 7 | V | VDD1-GND1, VDD2-GND2 | 3 | |
| Input Voltage | VIA, VIB | -0.5 | V | -0.5 V to VDDx + 0.5 V | 3 | ||
| Average Output Current per Pin | IO1, IO2 | -10 | 10 | mA | Side 1 / Side 2 output current | 3 | |
| Common-Mode Transients Immunity (abs max) | -300 | 300 | kV/µs | 3 | |||
| Storage Temperature | TST | -65 | 150 | °C | 3 | ||
| Ambient Operating Temperature (abs max) | TA | -40 | 125 | °C | 3 | ||
| Supply Voltage | VDDx | 3 | 5.5 | V | 3 | ||
| Data Rate | 0 | 150 | Kbps | 4 | |||
| Junction Temperature | TJ | -40 | 150 | °C | 4 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 4 | ||
| Propagation Delay Time | tpHL, tpLH | 3 | 4.5 | us | 5VDC supply | 5 | |
| Propagation Delay Time | tpHL, tpLH | 3.2 | 4.8 | us | 3.3VDC supply | 5 | |
| Pulse Width Distortion | PWD | 0 | 0.02 | 0.2 | us | @ 5VDC supply, /tpHL - tpLH/ | 5 |
| Minimum Pulse Width | PW | 6.5 | us | Within pulse width distortion (PWD) limit | 4 | ||
| Maximum Data Rate | 150 | Kbps | Within PWD limit | 4 | |||
| Input Current per Signal Channel | IIN | -10 | 0.5 | 10 | µA | 0 V ≤ Signal voltage ≤ VDDx | 6 |
| VDDx Undervoltage Rising Threshold | VDDxUV+ | 2.45 | 2.75 | 2.95 | V | 6 | |
| VDDx Undervoltage Falling Threshold | VDDxUV− | 2.3 | 2.6 | 2.75 | V | 6 | |
| Low Level Output Voltage | VOL | 0 | 0.1 | V | 20 µA output current | 6 | |
| Low Level Output Voltage | VOL | 0.1 | 0.2 | V | 2 mA output current | 6 | |
| IDD1 Quiescent Current | IDD1 (Q) | 0.31 | 0.38 | 0.5 | mA | 5VDC, VI=0V for π14xUx1 | 6 |
| IDD2 Quiescent Current | IDD2 (Q) | 1.42 | 1.77 | 2.3 | mA | 5VDC, VI=5V for π14xUx0 | 6 |
| IDD1 Quiescent Current | IDD1 (Q) | 0.12 | 0.15 | 0.2 | mA | 5VDC, VI=5V for π14xUx1 | 6 |
| IDD2 Quiescent Current | IDD2 (Q) | 1.53 | 1.92 | 2.49 | mA | 5VDC, VI=0V for π14xUx0 | 6 |
| IDD1 Quiescent Current | IDD1 (Q) | 0.23 | 0.28 | 0.37 | mA | 3.3VDC, VI=0V for π14xUx1 | 6 |
| IDD2 Quiescent Current | IDD2 (Q) | 1.39 | 1.74 | 2.26 | mA | 3.3VDC, VI=3.3V for π14xUx0 | 6 |
| IDD2 Quiescent Current | IDD2 (Q) | 1.52 | 1.9 | 2.47 | mA | 3.3VDC, VI=0V for π14xUx0 | 6 |
| Total Supply Current IDD1 (2 Kbps) | IDD1 | 0.26 | 0.39 | mA | 5VDC, 2 Kbps, CL = 0 pF | 7 | |
| Total Supply Current IDD2 (2 Kbps) | IDD2 | 1.84 | 2.76 | mA | 5VDC, 2 Kbps, CL = 0 pF | 7 | |
| Total Supply Current IDD1 (150 Kbps) | IDD1 | 0.26 | 0.39 | mA | 5VDC, 150 Kbps, CL = 0 pF | 7 | |
| Total Supply Current IDD2 (150 Kbps) | IDD2 | 1.88 | 2.82 | mA | 5VDC, 150 Kbps, CL = 0 pF | 7 | |
| Total Supply Current IDD1 (150 Kbps) | IDD1 | 0.2 | 0.3 | mA | 3.3VDC, 150 Kbps, CL = 0 pF | 7 | |
| Total Supply Current IDD2 (150 Kbps) | IDD2 | 1.84 | 2.76 | mA | 3.3VDC, 150 Kbps, CL = 0 pF | 7 | |
| Minimum External Air Gap (Clearance) | L (CLR) | 4 | mm | Input terminals to output terminals, shortest distance through air | 8 | ||
| Minimum External Tracking (Creepage) | L (CRP) | 4 | mm | Input terminals to output terminals, shortest distance path along body | 8 | ||
| Minimum Internal Gap | 11 | µm | Insulation distance through insulation | 8 | |||
| Rated Dielectric Insulation Voltage | 3000 | V rms | 1-minute duration | 8 | |||
| Maximum repetitive peak isolation voltage | VIORM | 565 | V peak | 9 | |||
| Output Signal Rise/Fall Time | tr/tf | 1.5 | ns | See Figure 10. | 5 | ||
| Common-Mode Transient Immunity | CMTI | 250 | kV/µs | VIN = VDDx or 0V, VCM = 1000 V | 5 | ||
| ESD (HBM) | ESD | -8 | 8 | kV | 5 | ||
| VDDx Hysteresis | VDDxUVH | 0.15 | V | 6 | |||
| Junction to Ambient Thermal Resistance | θJA | 100 | °C/W | Thermocouple located at center of package underside | 8 | ||
| Capacitance (Input to Output) | CIO | 1.5 | pF | @1MHz | 8 | ||
| Input Capacitance | CI | 3 | pF | @1MHz | 8 | ||
| Maximum Power Dissipation at 25°C | PS | 1.67 | W | Safety limiting value | 9 | ||
| Maximum Safety Temperature | TS | 150 | °C | Safety limiting value | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN V VDE V 0884-11, each π140U3x/π141U3x/π142U3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); each π140 | 9 |
CAD (KiCad official)
- Symbol:
π140U30 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
140u30-etched.step/140u30-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);140u30.step/140u30.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 2Pai Semi datasheet (19 pp, sha256
f608095d908800e7, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).