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π140M31

2Pai Semi · New Arrivals · SOIC-16

π140M31 from 2Pai Semi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, specified at 3 V to 5.5 V in the recommended operating conditions.
2 GND1 power_in Ground 1, the ground reference for isolator side 1.
3 VIA input Logic input A on side 1, transferred across the isolation barrier to output VOA.
4 VIB input Logic input B on side 1, transferred across the isolation barrier to output VOB.
5 VIC input Logic input C on side 1, transferred across the isolation barrier to output VOC.
6 VID input Logic input D on side 1, transferred across the isolation barrier to output VOD.
7 NC unconnected No connect.
8 GND1 power_in Ground 1, the ground reference for isolator side 1.
9 GND2 power_in Ground 2, the ground reference for isolator side 2.
10 NC unconnected No connect for π140M3X; this pin is the EN2 output enable only on the π140M6X variant, not on the π140M31.
11 VOD output Logic output D on side 2, the isolated copy of input VID.
12 VOC output Logic output C on side 2, the isolated copy of input VIC.
13 VOB output Logic output B on side 2, the isolated copy of input VIB.
14 VOA output Logic output A on side 2, the isolated copy of input VIA.
15 GND2 power_in Ground 2, the ground reference for isolator side 2.
16 VDD2 power_in Supply voltage for isolator side 2, specified at 3 V to 5.5 V in the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-16
Category Others
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDDx 3 5.5 V Note 1: VDDx is the side supply VDD (x = 1 or 2) 3
Low Level Input Signal Voltage VIL 0 V Max printed as 0.3*VDDx (expression, not numeric) 4
High Level Output Current IOH -6 mA 4
Low Level Output Current IOL 6 mA 4
Data Rate 0 10 Mbps 4
Junction Temperature TJ -40 150 °C 4
Ambient Operating Temperature TA -40 125 °C 4
Supply Voltages (VDD1-GND1, VDD2-GND2) -0.5 7 V 3
Input Voltages (VIA, VIB) -0.5 V Max printed as VDDx + 0.5 V (expression, not numeric) 3
Output Voltages (VOA, VOB) -0.5 V Max printed as VDDx + 0.5 V (expression, not numeric) 3
Average Output Current per Pin, Side 1 (IO1) IO1 -10 10 mA 3
Average Output Current per Pin, Side 2 (IO2) IO2 -10 10 mA 3
Common-Mode Transients Immunity -200 200 kV/µs 3
Storage Temperature Range TST -65 150 °C 3
Ambient Operating Temperature Range TA -40 125 °C 3
Minimum Pulse Width PW 100 ns Within pulse width distortion (PWD) limit 4
Maximum Data Rate 10 Mbps Within PWD limit 5
Propagation Delay Time tpHL, tpLH tpHL, tpLH 5.5 8 12.5 ns 5VDC supply 5
Propagation Delay Time tpHL, tpLH tpHL, tpLH 6.5 9 13.5 ns 3.3VDC supply 5
Pulse Width Distortion PWD 0.3 3 ns 5VDC supply; /tpHL - tpLH/ 5
Pulse Width Distortion PWD 0.4 3 ns 3.3VDC supply; /tpHL - tpLH/ 5
Part to Part Propagation Delay Skew tPSK 2 ns 5VDC supply; same temperature, load and voltage 5
Channel to Channel Propagation Delay Skew tCSK 0 1.8 ns 5VDC supply; between any two output channels in one device 5
Channel to Channel Propagation Delay Skew tCSK 0 2 ns 3.3VDC supply; between any two output channels in one device 5
Output Signal Rise/Fall Time tr/tf 1.5 ns See Figure 10 5
Common-Mode Transient Immunity CMTI 75 kV/µs VIN = VDDx or 0V, VCM = 1000 V 5
ESD Human Body Model ESD -8 8 kV HBM, ±8 kV 5
Total Supply Current IDD1 (150 Kbps) IDD1 0.28 0.42 mA 150 Kbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD2 (150 Kbps) IDD2 1.9 2.85 mA 150 Kbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD1 (1 Mbps) IDD1 0.3 0.45 mA 1 Mbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD2 (1 Mbps) IDD2 2.04 3.06 mA 1 Mbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD1 (10 Mbps) IDD1 0.48 0.72 mA 10 Mbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD2 (10 Mbps) IDD2 3.52 5.28 mA 10 Mbps, CL = 0 pF, 5VDC supply 8
Total Supply Current IDD1 (150 Kbps) IDD1 0.22 0.33 mA 150 Kbps, CL = 0 pF, 3.3VDC supply 8
Total Supply Current IDD2 (150 Kbps) IDD2 1.86 2.79 mA 150 Kbps, CL = 0 pF, 3.3VDC supply 8
Total Supply Current IDD1 (1 Mbps) IDD1 0.24 0.36 mA 1 Mbps, CL = 0 pF, 3.3VDC supply 8
Total Supply Current IDD2 (1 Mbps) IDD2 1.94 2.91 mA 1 Mbps, CL = 0 pF, 3.3VDC supply 8
Total Supply Current IDD1 (10 Mbps) IDD1 0.36 0.54 mA 10 Mbps, CL = 0 pF, 3.3VDC supply 8
Total Supply Current IDD2 (10 Mbps) IDD2 2.86 4.29 mA 10 Mbps, CL = 0 pF, 3.3VDC supply 8
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration 9
Minimum External Air Gap (Clearance) L (CLR) 4 mm Measured from input terminals to output terminals, shortest distance through air 9
Minimum External Tracking (Creepage) L (CRP) 4 mm Measured from input terminals to output terminals, shortest distance along body 9
Minimum Internal Gap (Internal Clearance) 11 µm Insulation distance through insulation 9
Comparative Tracking Index CTI 400 V DIN EN 60112 (VDE 0303-11):2010-05; printed as >400 9
Maximum Repetitive Peak Isolation Voltage VIORM 565 V peak DIN VDE V 0884-11, basic insulation 10
Highest Allowable Overvoltage VIOTM 4200 V peak 10
Surge Isolation Voltage Basic VIOSM 3615 V peak Basic insulation, 1.2/50 µs combination wave, VTEST = 1.3 × VIOSM (qualification) 10
Maximum Safety Temperature TS 150 °C Safety limiting value, maximum value allowed in the event of a failure 10
Maximum Power Dissipation (Safety Limiting) PS 1.67 W at 25°C, safety limiting value 10
Powered Supply Threshold VDDx 2.95 V Powered per truth table note 2 (VDDx ≥ 2.95 V) 4
Unpowered Supply Threshold VDDx 2.3 V Unpowered per truth table note 3 (VDDx < 2.30 V) 4
Junction to Ambient Thermal Resistance θJA 100 °C/W Thermocouple located at center of package underside (π14xM3x typical) 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-11, each π140M3x/π141M3x/π142M3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); each π140 10

CAD (KiCad official)

  • Symbol: π140M31
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 140m31-etched.step / 140m31-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 140m31.step / 140m31.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (20 pp, sha256 85b22c927af6ccc5, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF