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π130U30

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2Pai Semi Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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π130U30

2Pai Semi · Digital Isolators · SOIC-16

π130U30 from 2Pai Semi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypass with 0.1 µF to 10 µF to GND1.
2 GND1 power_in Ground 1, the ground reference for isolator side 1.
3 VIA input Logic input A on side 1, with VIH of 0.7VDD1 minimum and VIL of 0.3VDD1 maximum.
4 VIB input Logic input B on side 1, with VIH of 0.7VDD1 minimum and VIL of 0.3VDD1 maximum.
5 VIC input Logic input C on side 1, with VIH of 0.7VDD1 minimum and VIL of 0.3VDD1 maximum.
6 NC unconnected No connect.
7 NC unconnected No connect.
8 GND1 power_in Ground 1, the ground reference for isolator side 1.
9 GND2 power_in Ground 2, the ground reference for isolator side 2.
10 NC unconnected No connect for the π130U3X (this pin is the EN2 output enable only on the π130U6X).
11 NC unconnected No connect.
12 VOC output Logic output C on side 2, rated for ±6 mA recommended output current (default low for the π130U30 when the input is open or unpowered).
13 VOB output Logic output B on side 2, rated for ±6 mA recommended output current (default low for the π130U30 when the input is open or unpowered).
14 VOA output Logic output A on side 2, rated for ±6 mA recommended output current (default low for the π130U30 when the input is open or unpowered).
15 GND2 power_in Ground 2, the ground reference for isolator side 2.
16 VDD2 power_in Supply voltage for isolator side 2, operating range 3 V to 5.5 V (absolute maximum 7.0 V), bypass with 0.1 µF to 10 µF to GND2.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDDx -0.5 7 V VDD1-GND1, VDD2-GND2, TA=25°C 3
Input Voltage VIA, VIB -0.5 V upper limit VDDx + 0.5 V 3
Output Voltage VOA, VOB -0.5 V upper limit VDDx + 0.5 V 3
Side 1 Average Output Current per Pin IO1 -10 10 mA 3
Side 2 Average Output Current per Pin IO2 -10 10 mA 3
Common-Mode Transients Immunity -300 300 kV/µs 3
Storage Temperature TST -65 150 °C 3
Ambient Operating Temperature TA -40 125 °C 3
Supply Voltage VDDx 3 5.5 V 3
High Level Output Current IOH -6 mA 3
Low Level Output Current IOL 6 mA 3
Data Rate 0 150 Kbps 3
Junction Temperature TJ -40 150 °C 3
Ambient Operating Temperature TA -40 125 °C 3
Minimum Pulse Width PW 6.5 us Within pulse width distortion (PWD) limit 4
Maximum Data Rate 150 Kbps Within pulse width distortion (PWD) limit 4
Propagation Delay Time tpHL, tpLH 3 4.5 us @ 5VDC supply 4
Propagation Delay Time tpHL, tpLH 3.2 4.8 us @ 3.3VDC supply 4
Pulse Width Distortion PWD 0 0.02 0.2 us @ 5VDC supply, /tpHL - tpLH/ 4
ESD (HBM) ESD -8 8 kV Human body model 4
Input Current per Signal Channel IIN -10 0.5 10 µA 0 V ≤ Signal voltage ≤ VDDX 5
VDDx Undervoltage Rising Threshold VDDxUV+ 2.45 2.75 2.95 V 5
VDDx Undervoltage Falling Threshold VDDxUV− 2.3 2.6 2.75 V 5
Low Level Output Voltage VOL 0 0.1 V 20 µA output current 5
Low Level Output Voltage VOL 0.1 0.2 V 2 mA output current 5
IDD2 quiescent, 5VDC IDD2 (Q) 1.12 1.4 1.83 mA 5VDC, VI=5V for π13xUx0 5
IDD2 quiescent, 5VDC IDD2 (Q) 1.21 1.51 1.96 mA 5VDC, VI=0V for π13xUx0 5
IDD2 quiescent, 3.3VDC IDD2 (Q) 1.1 1.38 1.79 mA 3.3VDC, VI=3.3V for π13xUx0 5
IDD2 quiescent, 3.3VDC IDD2 (Q) 1.19 1.49 1.94 mA 3.3VDC, VI=0V for π13xUx0 6
IDD1 quiescent, 5VDC IDD1 (Q) 0.28 0.35 0.45 mA 5VDC, VI=0V for π13xUx1 5
IDD1 quiescent, 5VDC IDD1 (Q) 0.11 0.14 0.18 mA 5VDC, VI=5V for π13xUx1 5
IDD1 quiescent, 3.3VDC IDD1 (Q) 0.21 0.27 0.35 mA 3.3VDC, VI=0V for π13xUx1 5
IDD1 quiescent, 3.3VDC IDD1 (Q) 0.1 0.13 0.17 mA 3.3VDC, VI=3.3V for π13xUx1 5
VDDx Hysteresis VDDxUVH 0.15 V 5
Output Signal Rise/Fall Time tr/tf 1.5 ns See Figure 9. 4
Common-Mode Transient Immunity CMTI 250 kV/µs VIN = VDDx or 0V, VCM = 1000 V 4
IC Junction to Ambient Thermal Resistance θJA 100 °C/W Thermocouple located at center of package underside, π13xU3x 7
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration 7
Maximum repetitive peak isolation voltage VIORM 565 V peak 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-11, each π130U3X/π131U3X is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); each π130U6X/π131 7

CAD (KiCad official)

  • Symbol: π130U30
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 130u30-etched.step / 130u30-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 130u30.step / 130u30.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (18 pp, sha256 c1f54247416bb7ec, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF