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π121M31

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2Pai Semi Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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π121M31

2Pai Semi · Digital Isolators · SOIC-8

π121M31 from 2Pai Semi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, 3.0 V to 5.5 V operating range, with a 0.1 µF bypass capacitor to GND1.
2 VIA input Logic input A on side 1; the VIL max is 0.3VDD1 and the VIH min is 0.7VDD1.
3 VOB output Logic output B on side 1, with rated output current of ±6 mA (IOH -6 mA, IOL 6 mA).
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 VIB input Logic input B on side 2; the VIL max is 0.3VDD2 and the VIH min is 0.7VDD2.
7 VOA output Logic output A on side 2, with rated output current of ±6 mA (IOH -6 mA, IOL 6 mA).
8 VDD2 power_in Supply voltage for isolator side 2, 3.0 V to 5.5 V operating range, with a 0.1 µF bypass capacitor to GND2.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (absolute max) VDD1-GND1, VDD2-GND2 -0.5 7 V TA = 25°C 4
Side 1 Output Current IO1 -10 10 mA Average output current per pin 4
Side 2 Output Current IO2 -10 10 mA Average output current per pin 4
Common-Mode Transients Immunity (absolute max) -150 150 kV/µs 4
Storage Temperature TST -65 150 °C 4
Ambient Operating Temperature (absolute max) TA -40 125 °C 4
Supply Voltage VDDx 3 5.5 V 4
High Level Output Current IOH -6 mA 4
Low Level Output Current IOL 6 mA 4
Maximum Data Rate 0 10 Mbps 4
Junction Temperature TJ -40 150 °C 4
Ambient Operating Temperature TA -40 125 °C 4
Minimum Pulse Width PW 100 ns Within pulse width distortion (PWD) limit 5
Propagation Delay Time @ 5VDC tpHL, tpLH 5.5 8 12.5 ns 50% input to 50% output @ 5VDC supply 5
Propagation Delay Time @ 3.3VDC tpHL, tpLH 6.5 9 13.5 ns @ 3.3VDC supply 5
Pulse Width Distortion @ 5VDC PWD 0 0.3 0.8 ns @ 5VDC supply, /tpHL - tpLH/ 5
Pulse Width Distortion @ 3.3VDC PWD 0 0.3 0.8 ns @ 3.3VDC supply 5
Part to Part Propagation Delay Skew @ 5VDC tPSK 1 ns @ 5VDC supply 5
Part to Part Propagation Delay Skew @ 3.3VDC tPSK 1 ns @ 3.3VDC supply 5
Channel to Channel Propagation Delay Skew @ 5VDC tCSK 0 1 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew @ 3.3VDC tCSK 0 0.8 ns @ 3.3VDC supply 5
Output Signal Rise/Fall Time tr/tf 1.5 ns 10% to 90% signal terminated 50, See figure15 5
Common-Mode Transient Immunity CMTI 75 kV/µs VIN = VDDx or 0V, VCM = 1000 V 5
ESD (HBM) ESD -8 8 kV All pins 5
Jitter p-p 120 ps p-p See the Jitter Measurement section 5
Jitter rms 20 ps rms See the Jitter Measurement section 5
Dynamic Input Supply Current per Channel @ 5VDC IDDI (D) 9 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Output Supply Current per Channel @ 5VDC IDDO (D) 38 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Input Supply Current per Channel @ 3.3VDC IDDI (D) 5 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Dynamic Output Supply Current per Channel @ 3.3VDC IDDO (D) 23 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Low Level Output Voltage VOL 0 0.1 V 20 µA output current 6
Low Level Output Voltage VOL 0.1 0.2 V 2 mA output current 6
Input Current per Signal Channel IIN -10 0.5 10 µA 0 V ≤ Signal voltage ≤ VDDX 6
VDDx Undervoltage Rising Threshold VDDxUV+ 2.45 2.65 2.9 V 6
VDDx Undervoltage Falling Threshold VDDxUV− 2.3 2.5 2.75 V 6
VDDx Hysteresis VDDxUVH 0.15 V 6
π121Mxx Quiescent Supply Current IDD1 @ 5VDC IDD1 (Q) 419 524 681 µA 0V Input signal, @ 5VDC Supply 6
π121Mxx Quiescent Supply Current IDD2 @ 5VDC IDD2 (Q) 419 524 681 µA 0V Input signal, @ 5VDC Supply 6
π121Mxx Quiescent Supply Current IDD1 @ 5VDC IDD1 (Q) 436 545 709 µA 5V Input signal, @ 5VDC Supply 6
π121Mxx Quiescent Supply Current IDD2 @ 5VDC IDD2 (Q) 436 545 709 µA 5V Input signal, @ 5VDC Supply 6
π121Mxx Quiescent Supply Current IDD1 @ 3.3VDC IDD1 (Q) 414 518 673 µA 0V Input signal, @ 3.3VDC Supply 6
π121Mxx Quiescent Supply Current IDD2 @ 3.3VDC IDD2 (Q) 414 518 673 µA 0V Input signal, @ 3.3VDC Supply 6
π121Mxx Quiescent Supply Current IDD1 @ 3.3VDC IDD1 (Q) 408 510 663 µA 3.3V Input signal, @ 3.3VDC Supply 6
π121Mxx Quiescent Supply Current IDD2 @ 3.3VDC IDD2 (Q) 408 510 663 µA 3.3V Input signal, @ 3.3VDC Supply 6
π121Mxx Supply Current IDD1 @ 5VDC, 150 Kbps IDD1 0.54 0.81 mA 150 Kbps, @ 5VDC, CL = 0 pF (IDD2 same) 7
π121Mxx Supply Current IDD1 @ 5VDC, 1 Mbps IDD1 0.58 0.86 mA 1 Mbps, @ 5VDC, CL = 0 pF (IDD2 same) 7
π121Mxx Supply Current IDD1 @ 5VDC, 10 Mbps IDD1 0.97 1.46 mA 10 Mbps, @ 5VDC, CL = 0 pF (IDD2 same) 7
π121Mxx Supply Current IDD1 @ 3.3VDC, 150 Kbps IDD1 0.52 0.78 mA 150 Kbps, @ 3.3VDC, CL = 0 pF (IDD2 same) 7
π121Mxx Supply Current IDD1 @ 3.3VDC, 1 Mbps IDD1 0.54 0.81 mA 1 Mbps, @ 3.3VDC, CL = 0 pF (IDD2 same) 7
π121Mxx Supply Current IDD1 @ 3.3VDC, 10 Mbps IDD1 0.77 1.16 mA 10 Mbps, @ 3.3VDC, CL = 0 pF (IDD2 same) 7
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration, π12xM3x 7
Minimum External Air Gap (Clearance) L (CLR) 4 mm Input terminals to output terminals, shortest distance through air 7
Minimum External Tracking (Creepage) L (CRP) 4 mm Input terminals to output terminals, shortest distance path along body 7
Minimum Internal Gap (Internal Clearance) 11 µm Insulation distance through insulation 7
Capacitance (Input to Output) CI-O 0.6 pF @1MHz 7
Input Capacitance CI 3 pF @1MHz, input signal pin to ground 7
IC Junction to Ambient Thermal Resistance θJA 100 °C/W Thermocouple located at center of package underside 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-10, each π120M3x/π121M3x/π122M3x is proof tested by applying an insulation test voltage ≥ 1326 V peak for 1 sec (partial discharge detection limit = 5 pC); each π12 8

CAD (KiCad official)

  • Symbol: π121M31
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 121m31-etched.step / 121m31-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 121m31.step / 121m31.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (15 pp, sha256 f08bd9e63a89a35e, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF