component
π121M30
Public Made by Adomby adom
2Pai Semi Digital Isolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "121m30",
"version": "0.1.0",
"type": "component",
"description": "2Pai Semi Digital Isolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"signal isolation devices",
"π121m30",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"121m30.kicad_sym",
"121m30.kicad_mod",
"121m30.glb",
"121m30.step",
"121m30.lbr",
"docs/hero.png",
"docs/121m30-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"121m30-hero.glb",
"121m30-hero.overlay.json",
"121m30-etched.glb"
],
"component": {
"mpn": "π121M30",
"manufacturer": "2Pai Semi",
"package": "SOP-8",
"pin_count": 8,
"category": "Signal Isolation Devices",
"subcategory": "Digital Isolators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590207921221885952",
"parts": {
"symbol": "121m30.kicad_sym",
"footprint": "121m30.kicad_mod",
"model_3d": "121m30-hero.glb",
"model_3d_plain": "121m30-etched.glb",
"model_3d_step": "121m30-etched.step",
"model_3d_step_plain": "121m30.step",
"lbr": "121m30.lbr"
},
"distributor_links": {
"lcsc": "C2928231"
},
"distributor_check": {
"checked_at": "2026-10-18T13:33:10Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "VDD1",
"type": "power_in",
"description": "Primary-side isolator supply, which operates from 3.0 V to 5.5 V and should be bypassed to GND1 with a low-ESR ceramic capacitor of 0.1 µF to 10 µF placed as close to the device as possible."
},
{
"number": "2",
"name": "VIA",
"type": "input",
"description": "Channel A input on the primary side; logic high requires at least 0.7×VDD1 and logic low is at most 0.3×VDD1, with the absolute maximum input range of −0.5 V to VDD1 + 0.5 V."
},
{
"number": "3",
"name": "VOB",
"type": "output",
"description": "Channel B output on the secondary side, rated for IOH of −6 mA and IOL of 6 mA under recommended conditions, with absolute maximum output voltage of −0.5 V to VDD2 + 0.5 V; the π121M30 default output level is Low when the input side is unpowered."
},
{
"number": "4",
"name": "GND1",
"type": "power_in",
"description": "Primary-side ground reference for VDD1 and the channel A and B inputs."
},
{
"number": "5",
"name": "GND2",
"type": "power_in",
"description": "Secondary-side ground reference for VDD2 and the channel A and B outputs, rated for 3000 Vrms isolation for 1 minute with GND1."
},
{
"number": "6",
"name": "VIB",
"type": "input",
"description": "Channel B input on the primary side; logic high requires at least 0.7×VDD1 and logic low is at most 0.3×VDD1, with the absolute maximum input range of −0.5 V to VDD1 + 0.5 V."
},
{
"number": "7",
"name": "VOA",
"type": "output",
"description": "Channel A output on the secondary side, rated for IOH of −6 mA and IOL of 6 mA under recommended conditions, with absolute maximum output voltage of −0.5 V to VDD2 + 0.5 V."
},
{
"number": "8",
"name": "VDD2",
"type": "power_in",
"description": "Secondary-side isolator supply, which operates from 3.0 V to 5.5 V and should be bypassed to GND2 with a low-ESR ceramic capacitor of 0.1 µF to 10 µF."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin assignments for π121M3x come from Table 2 (text). The corresponding pin diagram (Figure 4) is no; Pin descriptions are based on general sections: the supply range (3.0–5.5 V), logic thresholds, outp; Ordering table lists π121M30 as NB SOIC-8 with default output Low; this package is used for the outp"
],
"pages_sent": 18,
"cost_usd": 0.0955,
"at": "2026-10-18T13:30:54"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590207921221885952",
"pages": 18,
"sha256": "1236ebd83e9a55d1",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "121m30.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "121m30-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
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1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3b5c2cdc5b9a669b9d694885045e4e6a1ffd0d5614a77ec3c2bfbd10f5a4fcfa",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}