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π121E30

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2Pai Semi Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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π121E30

2Pai Semi · Digital Isolators · SOIC-8

π121E30 from 2Pai Semi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply Voltage for Isolator Side 1, operating from 3.0 V to 5.5 V per the recommended operating conditions.
2 VIA input Logic Input A, the isolator side 1 input for channel A.
3 VOB output Logic Output B, the isolator side 2 output for channel B.
4 GND1 power_in Ground 1, the ground reference for Isolator Side 1.
5 GND2 power_in Ground 2, the ground reference for Isolator Side 2.
6 VIB input Logic Input B, the isolator side 1 input for channel B.
7 VOA output Logic Output A, the isolator side 2 output for channel A.
8 VDD2 power_in Supply Voltage for Isolator Side 2, operating from 3.0 V to 5.5 V per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDDx 3 5.5 V 4
Low Level Input Signal Voltage VIL 0 V 4
Data Rate 0 200 Mbps 4
Junction Temperature TJ -40 150 °C 4
Ambient Operating Temperature TA -40 125 °C 4
Supply Voltages (VDD1-GND1, VDD2-GND2) -0.5 7 V 3
Average Output Current per Pin Side 1 IO1 -10 10 mA 3
Average Output Current per Pin Side 2 IO2 -10 10 mA 3
Common-Mode Transients Immunity -200 200 kV/µs 3
Storage Temperature Range TST -65 150 °C 3
Ambient Operating Temperature Range TA -40 125 °C 3
Propagation Delay Time tpHL, tpLH 5.5 8 12.5 ns @ 5VDC supply 4
Propagation Delay Time tpHL, tpLH 6.5 9 13.5 ns @ 3.3VDC supply 4
Minimum Pulse Width PW 5 ns Within pulse width distortion (PWD) limit 4
Pulse Width Distortion PWD 0.3 3 ns @ 5VDC supply 4
Pulse Width Distortion PWD 0.4 3 ns @ 3.3VDC supply 4
Part to Part Propagation Delay Skew tPSK 2 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 1.8 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 2 ns @ 3.3VDC supply 5
Output Signal Rise/Fall Time tr/tf 1.5 ns See Figure 13. 5
Dynamic Input Supply Current per Channel IDDI (D) 9 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Output Supply Current per Channel IDDO (D) 38 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Input Supply Current per Channel IDDI (D) 5 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Dynamic Output Supply Current per Channel IDDO (D) 23 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Common-Mode Transient Immunity CMTI 75 kV/µs VIN = VDDx2 or 0V, VCM = 1000 V. 5
Jitter p-p 120 ps See the Jitter Measurement section 5
Jitter rms 20 ps See the Jitter Measurement section 5
Low Level Output Voltage VOL 0 0.1 V 20 µA output current 6
Low Level Output Voltage VOL 0.1 0.2 V 2 mA output current 6
Input Current per Signal Channel IIN -10 0.5 10 µA 0 V ≤ Signal voltage ≤ VDDX1 6
VDDx1 Undervoltage Rising Threshold VDDxUV+ 2.45 2.75 2.95 V 6
VDDx1 Undervoltage Falling Threshold VDDxUV− 2.3 2.6 2.75 V 6
VDDx1 Hysteresis VDDxUVH 0.15 V 6
Quiescent Supply Current, input side (π121E3x, 5VDC) IDD1 (Q) 0.42 0.52 0.68 mA 5VDC; VI=0V for π12xEx0 7
Quiescent Supply Current, output side (π121E3x, 5VDC) IDD2 (Q) 0.42 0.52 0.68 mA 5VDC; VI=5V for π12xEx1 7
Quiescent Supply Current, input side (π121E3x, 5VDC) IDD1 (Q) 0.44 0.55 0.71 mA 5VDC; VI=5V for π12xEx0 7
Quiescent Supply Current, output side (π121E3x, 5VDC) IDD2 (Q) 0.44 0.55 0.71 mA 5VDC; VI=0V for π12xEx1 7
Quiescent Supply Current, input side (π121E3x, 3.3VDC) IDD1 (Q) 0.41 0.52 0.67 mA 3.3VDC; VI=0V for π12xEx0 7
Quiescent Supply Current, output side (π121E3x, 3.3VDC) IDD2 (Q) 0.41 0.52 0.67 mA 3.3VDC; VI=3.3V for π12xEx1 7
Quiescent Supply Current, input side (π121E3x, 3.3VDC) IDD1 (Q) 0.41 0.51 0.66 mA 3.3VDC; VI=3.3V for π12xEx0 7
Quiescent Supply Current, output side (π121E3x, 3.3VDC) IDD2 (Q) 0.41 0.51 0.66 mA 3.3VDC; VI=0V for π12xEx1 7
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration 8
Minimum External Air Gap (Clearance) L (CLR) 4 mm Measured from input terminals to output terminals, shortest distance through air 8
Minimum External Tracking (Creepage) L (CRP) 4 mm Measured from input terminals to output terminals, shortest distance path along body 8
Minimum Internal Gap (Internal Clearance) 11 µm Insulation distance through insulation 8
Tracking Resistance (Comparative Tracking Index) CTI 400 V DIN EN 60112 (VDE 0303-11):2010-05; value printed as >400 8
Resistance (Input to Output) RIO 10 Ω 9
Capacitance (Input to Output) CIO 1.5 pF @1MHz 9
Input Capacitance CI 3 pF @1MHz 9
IC Junction to Ambient Thermal Resistance θJA 100 °C/W Thermocouple located at center of package underside 9
Maximum Safety Temperature TS 150 °C Safety limiting value per VDE 10
Maximum Power Dissipation at 25°C PS 1.25 W Safety limiting value per VDE 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-11, each π120E3x/π121E3x/π122E3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); each π120 9

CAD (KiCad official)

  • Symbol: π121E30
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 121e30-etched.step / 121e30-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 121e30.step / 121e30.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (18 pp, sha256 46f1f75769a4de29, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF