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π120E31Q

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2Pai Semi Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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π120E31Q

2Pai Semi · Digital Isolators · SOIC-8

π120E31Q from 2Pai Semi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, operating range 3 V to 5.5 V (absolute maximum 7.0 V) referenced to GND1.
2 VIA input Logic input A on side 1, with VIH of 0.7VDD1 minimum and VIL of 0.3VDD1 maximum; default output is high if left open (fail-safe high, '1' variant).
3 VIB input Logic input B on side 1, with VIH of 0.7VDD1 minimum and VIL of 0.3VDD1 maximum; default output is high if left open (fail-safe high, '1' variant).
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 VOB output Logic output B on side 2, rated for ±6 mA recommended output current (±10 mA absolute maximum).
7 VOA output Logic output A on side 2, rated for ±6 mA recommended output current (±10 mA absolute maximum).
8 VDD2 power_in Supply voltage for isolator side 2, operating range 3 V to 5.5 V (absolute maximum 7.0 V) referenced to GND2.

Key specifications

Parameter Value
Manufacturer 2Pai Semi
Package SOIC-8
Category Communication Interface Chip/UART/485/232
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD1-GND1, VDD2-GND2 -0.5 7 V TA = 25°C 3
Side 1 Output Current IO1 -10 10 mA Average output current per pin 3
Side 2 Output Current IO2 -10 10 mA Average output current per pin 3
Common-Mode Transients Immunity -200 200 kV/µs See Figure 17 3
Storage Temperature TST -65 150 °C 3
Ambient Operating Temperature TA -40 125 °C 3
Input/Output Voltages (VIA, VIB, VOA, VOB) -0.5 V Printed as -0.5 V ~ VDDx + 0.5 V 3
Supply Voltage VDDx 3 5.5 V 4
High Level Output Current IOH -6 mA 4
Low Level Output Current IOL 6 mA 4
Data Rate 0 200 Mbps 4
Junction Temperature TJ -40 150 °C 4
Ambient Operating Temperature TA -40 125 °C 4
Minimum Pulse Width PW 5 ns Within pulse width distortion (PWD) limit 4
Maximum Data Rate 200 Mbps Within PWD limit 4
Propagation Delay Time tpHL, tpLH 5.5 8 12.5 ns @ 5VDC supply 4
Propagation Delay Time tpHL, tpLH 6.5 9 13.5 ns @ 3.3VDC supply 4
Pulse Width Distortion PWD 0.3 3 ns @ 5VDC supply, /tpHL - tpLH/ 4
Pulse Width Distortion PWD 0.4 3 ns @ 3.3VDC supply, /tpHL - tpLH/ 4
Part to Part Propagation Delay Skew tPSK 2 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 1.8 ns @ 5VDC supply 5
Channel to Channel Propagation Delay Skew tCSK 0 2 ns @ 3.3VDC supply 5
Output Signal Rise/Fall Time tr/tf 1.5 ns See Figure 13 5
Common-Mode Transient Immunity CMTI 75 kV/µs VIN = VDDx or 0V, VCM = 1000 V 5
Jitter 120 ps p-p See the Jitter Measurement section 5
Jitter 20 ps rms See the Jitter Measurement section 5
ESD (HBM) ESD -8 8 kV 5
Low Level Output Voltage VOL 0 0.1 V 20 µA output current 6
Low Level Output Voltage VOL 0.1 0.2 V 2 mA output current 6
Input Current per Signal Channel IIN -10 0.5 10 µA 0 V ≤ Signal voltage ≤ VDDX 6
VDDx Undervoltage Rising Threshold VDDxUV+ 2.45 2.75 2.95 V 6
VDDx Undervoltage Falling Threshold VDDxUV− 2.3 2.6 2.75 V 6
VDDx Hysteresis VDDxUVH 0.15 V 6
Dynamic Input Supply Current per Channel IDDI (D) 9 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Output Supply Current per Channel IDDO (D) 38 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 5VDC Supply 5
Dynamic Input Supply Current per Channel IDDI (D) 5 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Dynamic Output Supply Current per Channel IDDO (D) 23 µA/Mbps Inputs switching, 50% duty cycle square wave, CL = 0 pF @ 3.3VDC Supply 5
Quiescent Supply Current, Side 1 (π120E3x) IDD1 (Q) 0.06 0.08 0.1 mA 5VDC, VI=0V for π12xEx0 6
Quiescent Supply Current, Side 2 (π120E3x) IDD2 (Q) 0.78 0.98 1.27 mA 5VDC, VI=5V for π12xEx1 6
Quiescent Supply Current, Side 1 (π120E3x) IDD1 (Q) 0.16 0.2 0.26 mA 5VDC, VI=5V for π12xEx0 6
Quiescent Supply Current, Side 2 (π120E3x) IDD2 (Q) 0.74 0.92 1.2 mA 5VDC, VI=0V for π12xEx1 7
Quiescent Supply Current, Side 1 (π120E3x) IDD1 (Q) 0.06 0.08 0.1 mA 3.3VDC, VI=0V for π12xEx0 7
Quiescent Supply Current, Side 2 (π120E3x) IDD2 (Q) 0.77 0.97 1.26 mA 3.3VDC, VI=3.3V for π12xEx1 7
Quiescent Supply Current, Side 1 (π120E3x) IDD1 (Q) 0.12 0.15 0.19 mA 3.3VDC, VI=3.3V for π12xEx0 7
Quiescent Supply Current, Side 2 (π120E3x) IDD2 (Q) 0.71 0.89 1.15 mA 3.3VDC, VI=0V for π12xEx1 7
Rated Dielectric Insulation Voltage 3000 V rms 1-minute duration 8
Minimum External Air Gap (Clearance) L (CLR) 4 mm Measured from input terminals to output terminals, shortest distance through air 8
Minimum External Tracking (Creepage) L (CRP) 4 mm Measured from input terminals to output terminals, shortest distance path along body 8
IC Junction to Ambient Thermal Resistance θJA 100 °C/W Thermocouple located at center of package underside 9
Capacitance (Input to Output) CIO 1.5 pF @1MHz 9
Input Capacitance CI 3 pF @1MHz 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-11, each π120E3x/π121E3x/π122E3x is proof tested by applying an insulation test voltage ≥ 848 V peak for 1 sec (partial discharge detection limit = 5 pC); each π120 9

CAD (KiCad official)

  • Symbol: π120E31Q
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 120e31q-etched.step / 120e31q-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 120e31q.step / 120e31q.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 2Pai Semi datasheet (18 pp, sha256 46f1f75769a4de29, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF