component
10G04S
Public Made by Adomby adom
HL MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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10G04S
HL · MOSFETs · SOP-8
10G04S from HL, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal S1 per the ordering-table pin assignment; the datasheet gives no separate pin-level limit, so the device ratings apply (VDS 40 V / -40 V, ID 10 A / -10 A at Ta=25°C). |
| 2 | G1 | input | Gate terminal G1 per the ordering-table pin assignment; gate-source voltage is rated ±20 V for both channels. |
| 3 | S2 | passive | Source terminal S2 per the ordering-table pin assignment; the datasheet gives no separate pin-level limit, so the device ratings apply (VDS 40 V / -40 V, ID 10 A / -10 A at Ta=25°C). |
| 4 | G2 | input | Gate terminal G2 per the ordering-table pin assignment; gate-source voltage is rated ±20 V for both channels. |
| 5 | D2 | passive | Drain terminal D2 (pins 5 and 6 are both D2); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 6 | D2 | passive | Drain terminal D2 (pins 5 and 6 are both D2); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 7 | D1 | passive | Drain terminal D1 (pins 7 and 8 are both D1); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 8 | D1 | passive | Drain terminal D1 (pins 7 and 8 are both D1); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| N-channel Drain-Source Voltage | VDS | 40 | V | 1 | |||
| P-channel Drain-Source Voltage | VDS | -40 | V | 1 | |||
| N-channel Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| P-channel Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| N-channel Continuous Drain Current | ID | 10 | A | Ta= 25℃ | 1 | ||
| P-channel Continuous Drain Current | ID | -10 | A | Ta= 25℃ | 1 | ||
| N-channel Continuous Drain Current | ID | 6.5 | A | Ta= 100℃ | 1 | ||
| P-channel Continuous Drain Current | ID | -6.5 | A | Ta= 100℃ | 1 | ||
| N-channel Pulsed Drain Current | IDM | 40 | A | 1 | |||
| P-channel Pulsed Drain Current | IDM | -40 | A | 1 | |||
| N-channel Single Pulse Avalanche Energy | EAS | 19 | mJ | 1 | |||
| P-channel Single Pulse Avalanche Energy | EAS | 27.5 | mJ | 1 | |||
| N-channel Power Dissipation | Pd | 3.4 | W | TC = 25℃ | 1 | ||
| P-channel Power Dissipation | Pd | 7.5 | W | TC = 25℃ | 1 | ||
| Junction Temperature | TJ | -55 | 150 | ℃ | 1 | ||
| Storage Temperature | TSTG | -55 | 150 | ℃ | 1 | ||
| N-channel Drain-Source Breakdown Voltage | V(BR)DSS | 40 | V | VGS=0V, ID=250μA | 2 | ||
| N-channel Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS=40V, VGS=0V | 2 | ||
| N-channel Gate to Body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 2 | |
| N-channel Gate Threshold Voltage | VGS(th) | 1 | 1.5 | 2.5 | V | VDS=VGS, ID=250μA | 2 |
| N-channel Static Drain-Source on-Resistance | RDS(on) | 17 | 20 | mΩ | VGS=10V, ID=10A | 2 | |
| N-channel Static Drain-Source on-Resistance | RDS(on) | 22 | 27 | mΩ | VGS=4.5V, ID=5A | 2 | |
| N-channel Maximum Continuous Drain to Source Diode Forward Current | IS | 10 | A | 2 | |||
| N-channel Maximum Pulsed Drain to Source Diode Forward Current | ISM | 40 | A | 2 | |||
| N-channel Drain to Source Diode Forward Voltage | VSD | -0.8 | -1.2 | V | VGS=0V, IS= 10A | 2 | |
| P-channel Drain-Source Breakdown Voltage | V(BR)DSS | -40 | V | VGS=0V, ID=250μA | 3 | ||
| P-channel Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS=-40V, VGS=0V | 3 | ||
| P-channel Gate to Body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 3 | |
| P-channel Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VDS=VGS, ID=-250μA | 3 |
| P-channel Static Drain-Source on-Resistance | RDS(on) | 34 | 44 | mΩ | VGS=-10V, ID=-8A | 3 | |
| P-channel Static Drain-Source on-Resistance | RDS(on) | 46 | 62 | mΩ | VGS=-4.5V, ID=-5A | 3 | |
| P-channel Maximum Continuous Drain to Source Diode Forward Current | IS | -10 | A | 3 | |||
| P-channel Maximum Pulsed Drain to Source Diode Forward Current | ISM | -40 | A | 3 | |||
| P-channel Drain to Source Diode Forward Voltage | VSD | -0.8 | -1.2 | V | VGS=0V, IS=-10A | 3 |
CAD (KiCad official)
- Symbol:
10G04S - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
10g04s-etched.step/10g04s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);10g04s.step/10g04s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HL datasheet (11 pp, sha256
c83bcaee031ef234, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 10G04S
**HL** · MOSFETs · SOP-8
10G04S from HL, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal S1 per the ordering-table pin assignment; the datasheet gives no separate pin-level limit, so the device ratings apply (VDS 40 V / -40 V, ID 10 A / -10 A at Ta=25°C). |
| 2 | G1 | input | Gate terminal G1 per the ordering-table pin assignment; gate-source voltage is rated ±20 V for both channels. |
| 3 | S2 | passive | Source terminal S2 per the ordering-table pin assignment; the datasheet gives no separate pin-level limit, so the device ratings apply (VDS 40 V / -40 V, ID 10 A / -10 A at Ta=25°C). |
| 4 | G2 | input | Gate terminal G2 per the ordering-table pin assignment; gate-source voltage is rated ±20 V for both channels. |
| 5 | D2 | passive | Drain terminal D2 (pins 5 and 6 are both D2); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 6 | D2 | passive | Drain terminal D2 (pins 5 and 6 are both D2); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 7 | D1 | passive | Drain terminal D1 (pins 7 and 8 are both D1); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
| 8 | D1 | passive | Drain terminal D1 (pins 7 and 8 are both D1); the datasheet rates drain-source voltage at 40 V (N-channel) and -40 V (P-channel), with continuous drain current 10 A and -10 A at Ta=25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| N-channel Drain-Source Voltage | VDS | | | 40 | V | | 1 |
| P-channel Drain-Source Voltage | VDS | | | -40 | V | | 1 |
| N-channel Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| P-channel Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| N-channel Continuous Drain Current | ID | | | 10 | A | Ta= 25℃ | 1 |
| P-channel Continuous Drain Current | ID | | | -10 | A | Ta= 25℃ | 1 |
| N-channel Continuous Drain Current | ID | | | 6.5 | A | Ta= 100℃ | 1 |
| P-channel Continuous Drain Current | ID | | | -6.5 | A | Ta= 100℃ | 1 |
| N-channel Pulsed Drain Current | IDM | | | 40 | A | | 1 |
| P-channel Pulsed Drain Current | IDM | | | -40 | A | | 1 |
| N-channel Single Pulse Avalanche Energy | EAS | | | 19 | mJ | | 1 |
| P-channel Single Pulse Avalanche Energy | EAS | | | 27.5 | mJ | | 1 |
| N-channel Power Dissipation | Pd | | | 3.4 | W | TC = 25℃ | 1 |
| P-channel Power Dissipation | Pd | | | 7.5 | W | TC = 25℃ | 1 |
| Junction Temperature | TJ | -55 | | 150 | ℃ | | 1 |
| Storage Temperature | TSTG | -55 | | 150 | ℃ | | 1 |
| N-channel Drain-Source Breakdown Voltage | V(BR)DSS | 40 | | | V | VGS=0V, ID=250μA | 2 |
| N-channel Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS=40V, VGS=0V | 2 |
| N-channel Gate to Body Leakage Current | IGSS | -100 | | 100 | nA | VDS=0V, VGS=±20V | 2 |
| N-channel Gate Threshold Voltage | VGS(th) | 1 | 1.5 | 2.5 | V | VDS=VGS, ID=250μA | 2 |
| N-channel Static Drain-Source on-Resistance | RDS(on) | | 17 | 20 | mΩ | VGS=10V, ID=10A | 2 |
| N-channel Static Drain-Source on-Resistance | RDS(on) | | 22 | 27 | mΩ | VGS=4.5V, ID=5A | 2 |
| N-channel Maximum Continuous Drain to Source Diode Forward Current | IS | | | 10 | A | | 2 |
| N-channel Maximum Pulsed Drain to Source Diode Forward Current | ISM | | | 40 | A | | 2 |
| N-channel Drain to Source Diode Forward Voltage | VSD | | -0.8 | -1.2 | V | VGS=0V, IS= 10A | 2 |
| P-channel Drain-Source Breakdown Voltage | V(BR)DSS | -40 | | | V | VGS=0V, ID=250μA | 3 |
| P-channel Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS=-40V, VGS=0V | 3 |
| P-channel Gate to Body Leakage Current | IGSS | -100 | | 100 | nA | VDS=0V, VGS=±20V | 3 |
| P-channel Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VDS=VGS, ID=-250μA | 3 |
| P-channel Static Drain-Source on-Resistance | RDS(on) | | 34 | 44 | mΩ | VGS=-10V, ID=-8A | 3 |
| P-channel Static Drain-Source on-Resistance | RDS(on) | | 46 | 62 | mΩ | VGS=-4.5V, ID=-5A | 3 |
| P-channel Maximum Continuous Drain to Source Diode Forward Current | IS | | | -10 | A | | 3 |
| P-channel Maximum Pulsed Drain to Source Diode Forward Current | ISM | | | -40 | A | | 3 |
| P-channel Drain to Source Diode Forward Voltage | VSD | | -0.8 | -1.2 | V | VGS=0V, IS=-10A | 3 |
## CAD (KiCad official)
- Symbol: `10G04S`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `10g04s-etched.step` / `10g04s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `10g04s.step` / `10g04s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HL datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600482573412159488) (11 pp, sha256 `c83bcaee031ef234`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/10g04s-datasheet.pdf)