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1-2199230-6

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TE Connectivity 1-2199230-6 M.2 (NGFF) Key M card-edge socket, 67 positions, 0.5 mm pitch, 4.2 mm height, SMT, 30 u-in gold. KiCad symbol, footprint, Fusion library and AI-created 3D.

componentconnectorm.2ngffkey mcard edgenvmete connectivity1-2199230-6
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docs Hero 16:10, provenance · John Lauer 2d ago
provenance Hero 16:10, provenance · John Lauer 2d ago
viewers Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6-etched.glb Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6-etched.step Add 1-2199230-6-etched.step · John Lauer 2d ago
1-2199230-6-hero.glb Add 1-2199230-6-hero.glb · John Lauer 2d ago
1-2199230-6-hero.overlay.json Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6.glb Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6.kicad_mod Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6.kicad_sym Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6.lbr Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
1-2199230-6.step Add 1-2199230-6.step · John Lauer 2d ago
LICENSE Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
package.json Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago
page.json Edited via adom-wiki: source · John Lauer 2d ago
README.md Component page: symbol, footprint, Fusion library, viewers, provenance, models · John Lauer 2d ago

1-2199230-6

TE Connectivity · M.2 (NGFF) card-edge sockets · M.2 card-edge socket, 21.9 x 8.7 x 4.2 mm, SMT, 2 solder pegs, 2 locating bosses

The TE Connectivity 1-2199230-6 is an M.2 (NGFF) card-edge socket with key M, 67 populated positions on a 0.5 mm pitch and a 4.2 mm maximum height, for Socket 3 modules (PCIe x4 NVMe SSDs and SATA M.2 cards). The card seats 2.48 mm (REF) above the PCB and is held at its far end by a screw on a standoff. Contacts carry 30 u-in minimum gold in the mating area (product spec 108-115042). Note that TE uses the same drawing (C-2199230) for several key options: the 2199230-x parts without the 1- prefix and 1-2199230-0/-1/-2 are keys A, B or E, not M.

Key specifications

Parameter Value
Key M (positions 59 to 66 keyed out)
Positions 67 populated (75 numbered)
Pitch 0.5 mm
Height 4.2 mm max
Card underside above PCB 2.48 mm (REF)
Contact plating 30 u-in min gold in the mating area (product spec 108-115042)
Housing High-temperature thermoplastic, UL94V-0, black
Solder pegs Stainless steel, matte tin
Coplanarity 0.10 mm max
Weight 0.64 g

Source: TE drawing C-2199230 rev B4 sheets 1-2.

Pinout

Pin Name Type Function
1 GND power_in Ground
2 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
3 GND power_in Ground
4 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
5 PERn3 passive PCIe lane 3 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
6 PWRDIS passive Power disable (optional, later spec revisions); N/C on early hosts
7 PERp3 passive PCIe lane 3 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
8 PLN# passive Power-loss notification (optional); N/C if unused
9 GND power_in Ground
10 DAS/DSS# passive Device activity / disable staggered spin-up (LED drive, open drain)
11 PETn3 passive PCIe lane 3 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
12 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
13 PETp3 passive PCIe lane 3 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
14 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
15 GND power_in Ground
16 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
17 PERn2 passive PCIe lane 2 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
18 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
19 PERp2 passive PCIe lane 2 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
20 NC20 no_connect No connect per M.2 Socket 3 Key M
21 GND power_in Ground
22 NC22 no_connect No connect per M.2 Socket 3 Key M
23 PETn2 passive PCIe lane 2 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
24 NC24 no_connect No connect per M.2 Socket 3 Key M
25 PETp2 passive PCIe lane 2 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
26 NC26 no_connect No connect per M.2 Socket 3 Key M
27 GND power_in Ground
28 NC28 no_connect No connect per M.2 Socket 3 Key M
29 PERn1 passive PCIe lane 1 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
30 NC30 no_connect No connect per M.2 Socket 3 Key M
31 PERp1 passive PCIe lane 1 PER (R) pair per M.2 naming; confirm TX/RX direction vs host
32 NC32 no_connect No connect per M.2 Socket 3 Key M
33 GND power_in Ground
34 NC34 no_connect No connect per M.2 Socket 3 Key M
35 PETn1 passive PCIe lane 1 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
36 NC36 no_connect No connect per M.2 Socket 3 Key M
37 PETp1 passive PCIe lane 1 PET (T) pair per M.2 naming; confirm TX/RX direction vs host
38 DEVSLP passive SATA device sleep (SATA hosts only)
39 GND power_in Ground
40 SMB_CLK passive SMBus clock (1.8 V, optional)
41 PERn0/SATA-B+ passive PCIe lane 0 PER (R) pair per M.2 naming; confirm TX/RX direction vs host; shared with SATA
42 SMB_DATA passive SMBus data (1.8 V, optional)
43 PERp0/SATA-B- passive PCIe lane 0 PER (R) pair per M.2 naming; confirm TX/RX direction vs host; shared with SATA
44 ALERT# passive SMBus alert (1.8 V, optional)
45 GND power_in Ground
46 NC46 no_connect No connect per M.2 Socket 3 Key M
47 PETn0/SATA-A- passive PCIe lane 0 PET (T) pair per M.2 naming; confirm TX/RX direction vs host; shared with SATA
48 NC48 no_connect No connect per M.2 Socket 3 Key M
49 PETp0/SATA-A+ passive PCIe lane 0 PET (T) pair per M.2 naming; confirm TX/RX direction vs host; shared with SATA
50 PERST# passive PCIe lane T PER (R) pair per M.2 naming; confirm TX/RX direction vs host
51 GND power_in Ground
52 CLKREQ# passive PCIe clock request (open drain, bidirectional)
53 REFCLKn passive PCIe 100 MHz reference clock -
54 PEWAKE# passive PCIe wake (module open-drain output)
55 REFCLKp passive PCIe 100 MHz reference clock +
56 MFG_DATA no_connect Manufacturing use only; leave unconnected
57 GND power_in Ground
58 MFG_CLK no_connect Manufacturing use only; leave unconnected
67 NC67 no_connect No connect per M.2 Socket 3 Key M
68 SUSCLK passive 32.768 kHz suspend clock from host (optional)
69 PEDET passive Interface detect: module ties NC=PCIe / GND=SATA
70 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
71 GND power_in Ground
72 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
73 GND power_in Ground
74 3.3V power_in Module supply, 3.3 V (all 3.3V pins in parallel)
75 GND power_in Ground
MP MP mechanical Two solder-peg pads 1.2 x 2.75 (not in symbol); tie to GND copper

Pin names follow the PCI Express M.2 Socket 3 Key M assignment. PET/PER are named from the module's side, as in the specification; confirm the TX/RX pairing against your host before routing. Optional pins (6 PWRDIS, 8 PLN#, 10 DAS/DSS#, 56 MFG_DATA, 58 MFG_CLK) depend on the specification revision.

Footprint

Pads follow TE's recommended PCB layout (C-2199230 sheet 3): 34 odd-row and 33 even-row 0.30 x 1.55 mm pads, two 1.2 x 2.75 mm solder-peg pads numbered MP (tie them to ground copper), and two non-plated locating holes (dia 1.1 at x = -10 and dia 1.6 at x = +10). The origin is the connector centre on the locating-hole line; the card extends toward +Y. Drawing layer (Dwgs.User) markers show the card edge and the module screw positions for 2230 and 2242 cards: those positions are derived from the card length and are not from a TE drawing, so check them against the M.2 specification or your module's drawing.

3D models

All 3D models on this page are AI-created from the manufacturer's dimensioned drawings (no manufacturer CAD file is used or redistributed). They are Z-up, in millimetres, seated on the PCB top surface (z = 0) at the footprint origin, so the footprint's model reference needs no offset or rotation. The builder script is in provenance/tools/.

File What it is
1-2199230-6.step / 1-2199230-6.glb Plain model
1-2199230-6-etched.step / 1-2199230-6-etched.glb Board-use model: the plain model plus a virtual laser-etched MPN (housing top, one line along the 21.9 mm axis) as its own Adom.LaserEtch part
1-2199230-6-hero.glb Page model only: the board-use model plus teal dashed pad outlines, silkscreen with pin 1 and pad signal names (adom-hero 1.4). Do not place it on a board.

The etched part number is a virtual identification aid, not the manufacturer's marking. Virtual identification aid. The real part carries the TE logo, key ID and date code (drawing sheet 1), not the part number.

Sourcing

Distributor Part number Link
Mouser 571-1-2199230-6 https://www.mouser.com/en/ProductDetail/TE-Connectivity/1-2199230-6?qs=N0TJGnUfxCALyAe4Cgc7ng%3D%3D
DigiKey A118046TR-ND https://www.digikey.com/en/products/detail/te-connectivity-amp-connectors/1-2199230-6/4731766
LCSC C4710843 https://www.lcsc.com/product-detail/C4710843.html

Distributor numbers checked on 2026-10-17 with adom-parts-search; check current stock and price at the links.

Manufacturer and resources

Resource Link
Product page https://www.te.com/en/product-1-2199230-6.html
TE customer drawing C-2199230 rev B4 (ECN-24-290780, 05NOV2024), 4 sheets https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=2199230&DocType=Customer%20Drawing&DocLang=English&DocFormat=pdf
TE application specification 114-115006 rev C (Figure 2 = same PCB layout as sheet 3) https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=114-115006&DocType=Specification%20Or%20Standard&DocLang=English&DocFormat=pdf&PartCntxt=1-2199230-6
TE customer view model CVM_1-2199230-6 rev B3 (c-1-2199230-6-b3-3d.stp) https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=CVM_1-2199230-6&DocType=Customer%20View%20Model&DocLang=English&DocFormat=3d_stp.zip&PartCntxt=1-2199230-6
PCI Express M.2 Specification, Socket 3 Key M pin assignment https://pcisig.com/specifications

Manufacturer documents are linked, not copied: download them from the manufacturer.

Files

File Contents
1-2199230-6.kicad_sym KiCad symbol with MPN, manufacturer and distributor fields
1-2199230-6.kicad_mod KiCad footprint
1-2199230-6.lbr Fusion 360 / EAGLE library (adom-lbr, lint clean)
viewers/symbol.html, viewers/footprint.html Interactive embeds
1-2199230-6-hero.overlay.json Hero artwork sidecar: pads, labels, alignment
provenance/provenance.json Per-file provenance: source, classification, SHA-256, assumptions
provenance/tools/ Builder script for the AI-created STEP
LICENSE CC BY 4.0 for the Adom-authored files

Provenance

Every file is classified in provenance/provenance.json as source-derived (written from a cited manufacturer document), AI-created (modelled from cited drawings) or derived (generated by a tool), with its SHA-256 and the source document's revision, retrieval date and hash.

Open items:

  • M.2 module screw positions on Dwgs.User are derived, not from TE
  • Optional pin names (6, 8, 10, 56, 58) depend on the M.2 spec revision
  • align guard compares only the lowest geometry (the locating bosses) on this part; the per-pad check covers the tails

License

The Adom-authored files are CC BY 4.0. Manufacturer documents and trademarks remain their owners'; none are redistributed here.