component
099-04AT1G
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UMW ESD And Surge Protection (TVS/ESD), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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099-04AT1G
UMW · ESD And Surge Protection (TVS/ESD) · SOT-23-6
099-04AT1G from UMW, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH1 | bidirectional | Channel 1 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with a 5 V reverse working voltage and 0.9 pF max I/O-to-GND capacitance. |
| 2 | GND | power_in | Ground reference pin for the ESD array, connected to the negative rail, with the integrated zener between VDD and GND. |
| 3 | CH2 | bidirectional | Channel 2 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
| 4 | CH3 | bidirectional | Channel 3 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
| 5 | VDD | power_in | Positive supply rail of the ESD array, with the integrated zener connected between VDD and GND. |
| 6 | CH4 | bidirectional | Channel 4 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOT-23-6 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | 5 | V | Any I/O pin to GND | 2 | ||
| Reverse Breakdown Voltage | VBR | 6 | V | IT=1mA, Any I/O pin to GND | 2 | ||
| Reverse Leakage Current | IR | 1 | µA | VRWM=5V, T=25°C, Any I/O pin to GND | 2 | ||
| Junction Capacitance Between Channel | CJ1 | 0.35 | 0.45 | pF | VR=0V, f=1MHz, Between I/O pins | 2 | |
| Junction Capacitance Between I/O and GND | CJ2 | 0.9 | pF | VR=0V, f=1MHz, Any I/O pin to GND | 2 | ||
| Peak Pulse Power | PPP | 150 | W | 8/20µs | 2 | ||
| Peak Pulse Current | IPP | 5 | A | 8/20µs | 2 | ||
| ESD per IEC 61000-4-2 (Air) | VESD1 | -15 | 15 | kV | 2 | ||
| ESD per IEC 61000-4-2 (Contact) | VESD2 | -8 | 8 | kV | 2 | ||
| Junction Temperature Range | TOPR | -55 | 125 | °C | 2 | ||
| Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
099-04AT1G - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
099-04at1g-etched.step/099-04at1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);099-04at1g.step/099-04at1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (7 pp, sha256
975681842d7cbbe9, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 099-04AT1G
**UMW** · ESD And Surge Protection (TVS/ESD) · SOT-23-6
099-04AT1G from UMW, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH1 | bidirectional | Channel 1 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with a 5 V reverse working voltage and 0.9 pF max I/O-to-GND capacitance. |
| 2 | GND | power_in | Ground reference pin for the ESD array, connected to the negative rail, with the integrated zener between VDD and GND. |
| 3 | CH2 | bidirectional | Channel 2 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
| 4 | CH3 | bidirectional | Channel 3 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
| 5 | VDD | power_in | Positive supply rail of the ESD array, with the integrated zener connected between VDD and GND. |
| 6 | CH4 | bidirectional | Channel 4 ESD-protected I/O line that steers ESD current to the VDD or GND rail, with 0.45 pF max channel-to-channel capacitance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOT-23-6 |
| Category | Circuit Protection |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | | | 5 | V | Any I/O pin to GND | 2 |
| Reverse Breakdown Voltage | VBR | 6 | | | V | IT=1mA, Any I/O pin to GND | 2 |
| Reverse Leakage Current | IR | | | 1 | µA | VRWM=5V, T=25°C, Any I/O pin to GND | 2 |
| Junction Capacitance Between Channel | CJ1 | | 0.35 | 0.45 | pF | VR=0V, f=1MHz, Between I/O pins | 2 |
| Junction Capacitance Between I/O and GND | CJ2 | | | 0.9 | pF | VR=0V, f=1MHz, Any I/O pin to GND | 2 |
| Peak Pulse Power | PPP | | | 150 | W | 8/20µs | 2 |
| Peak Pulse Current | IPP | | | 5 | A | 8/20µs | 2 |
| ESD per IEC 61000-4-2 (Air) | VESD1 | -15 | | 15 | kV | | 2 |
| ESD per IEC 61000-4-2 (Contact) | VESD2 | -8 | | 8 | kV | | 2 |
| Junction Temperature Range | TOPR | -55 | | 125 | °C | | 2 |
| Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
## CAD (KiCad official)
- Symbol: `099-04AT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `099-04at1g-etched.step` / `099-04at1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `099-04at1g.step` / `099-04at1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755873160716013568) (7 pp, sha256 `975681842d7cbbe9`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/099-04at1g-datasheet.pdf)