board
Solar MPPT Power System
Public Unreviewedby TylerK
A 30 W solar battery charger with regulated 5 V and 3.3 V rails: an STM32G031 running perturb & observe MPPT and a CC/CV charge state machine, steering a TI LM5175 4-switch buck-boost through a single analog control input. Four-layer KiCad board, schematic and PCB generated from Python, with an electrothermal simulation run against the published board file.
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README.md+21−20@@ -9,6 +9,27 @@ input range. --- +## The board++++102 components across 9 functional blocks on a 195 x 135mm, 4-layer board: solar input+& protection (fuse, LM74700 ideal-diode stage), housekeeping bias (LM5165,+self-starting off raw panel input), the LM5175 MPPT/charge power stage,+current/voltage sensing (2x INA180), the MCU, two POL buck stages (TPS62130 5V/2A,+TLV62569 3.3V/1A), output filtering, and connectors plus test points. Full+block-by-block breakdown in [`docs/03-schematic-summary.md`](docs/03-schematic-summary.md).++++++Both close-ups show the fine-pitch layout this board's density demands: U8/U9 (the POL+bucks) are QFN-16 at 0.5mm pitch and SOT-563 at 0.5mm pitch, and U4 (the LM5175) is an+HTSSOP-28 at 0.65mm pitch — see "PCB status" below for how that played out in routing.+Full 4-layer copper plot: [`docs/routing.svg`](docs/routing.svg). Full schematic:+[`hardware/schematic.pdf`](hardware/schematic.pdf).+ ## Simulation-driven copper fixes An electrothermal (DC current-density + steady-state thermal) simulation was run@@ -46,26 +67,6 @@ power stage cluster. Both results are **screening models** (board-surface temper not junction temperature; DC-only copper resistance excluding component/connector/ solder-joint resistance) — full caveats in the linked report. -## The board----102 components across 9 functional blocks on a 195 x 135mm, 4-layer board: solar input-& protection (fuse, LM74700 ideal-diode stage), housekeeping bias (LM5165,-self-starting off raw panel input), the LM5175 MPPT/charge power stage,-current/voltage sensing (2x INA180), the MCU, two POL buck stages (TPS62130 5V/2A,-TLV62569 3.3V/1A), output filtering, and connectors plus test points. Full-block-by-block breakdown in [`docs/03-schematic-summary.md`](docs/03-schematic-summary.md).------Both close-ups show the fine-pitch layout this board's density demands: U8/U9 (the POL-bucks) are QFN-16 at 0.5mm pitch and SOT-563 at 0.5mm pitch, and U4 (the LM5175) is an-HTSSOP-28 at 0.65mm pitch — see "PCB status" below for how that played out in routing.-Full 4-layer copper plot: [`docs/routing.svg`](docs/routing.svg).- ## Control architecture The LM5175 exposes exactly one analog control input to firmware: its FB pin, which sets