From the project's own overview document (author-written).
STM32G431 + DRV8300 three-phase ESC running AM32. 64 × 74 mm, 4-layer. Target motor EMAX PRO 2808-1350KV, 3–6S, 25.2 V max, 58.5 A, 1474 W.
Sense chain values and part numbers are in Pinout.md. Firmware constants are in Firmware.md.
Ship target: ADOM_ESC_G431 — the custom block in Firmware.md §3.1.
Closest existing AM32 target: SEQURE_G431 (and SEQURE_G431_CAN).
SEQURE_G431 |
this board | |
|---|---|---|
| hardware group | HARDWARE_GROUP_G4_D |
same |
| pin and channel defines | — | identical |
USE_PULSE_OUT (RPM pin) |
defined | defined |
TARGET_VOLTAGE_DIVIDER |
480 (48:1) | 110 (11:1) |
MILLIVOLT_PER_AMP |
5 | 25 |
The other four G431 targets do not define USE_PULSE_OUT; PB10 would sit analog/high-Z.
SEQURE_G431 spins the motor as-is with no driver work. Its voltage and current telemetry read
wrong until the custom block is used — only the plumbing is shared.
AF6, active low. A break event clears MOE in TIM1_BDTR, and with AOE = 0 it latches: outputs
stay dead until firmware re-enables MOE or the MCU resets.
BKF filterPB8 / pin 45 has R14 10 k to GND and is routed nowhere.
AN2606 Rev 61 Pattern 15, which the G431 uses, has no "flash empty" clause — a blank part will not self-enter the bootloader. The only entry is BOOT0 high at reset, so ROM DFU requires physical access.
The ROM bootloader's USART is PA9/PA10, which on this board are DRV8300 gate inputs. The FC's UART on PB6/PB7 cannot reach it; USB is the only ROM path.
A single-motor electronic speed controller. It takes a battery input (18.0–25.2 V), clamps and bucks it to a 12 V gate-driver rail, and an STM32G431 running AM32 commutates a three-phase bridge of six MOSFETs through a DRV8300 gate driver, with low-side current sense feeding the MCU.
The battery is clamped by a SMBJ26A TVS (D1) — VBAT operating 26 V standoff, transient clamp ~42 V — then a TPSM365R6V5 synchronous buck module (U2) makes 12 V for the gate driver, and an AP2112K-3.3 (U3) makes the MCU's 3.3 V. Input range 18.0–25.2 V.
Three half-bridges — six BSC016N06NS MOSFETs (Q1–Q6) — drive the motor's three phases. Deadtime is set externally at the gate driver.
DRV8300DPWR (U4) level-shifts and drives the six gates from the 12 V rail (source 750 mA, sink 1.5 A). The bootstrap caps are sized from the MOSFET gate charge: with V_GVDD 12 V, C_BST ≥ 8.6 nF and C_GVDD ≥ 10× C_BST.
A 0.5 mΩ shunt and an INA181A2 (U6, gain 50 V/V) give 25 mV/A into the MCU's ADC — 58.5 A → 1.46 V, full-scale 131 A, total error about ±0.47 A (0.8%). A back-EMF divider/filter feeds commutation sensing.
STM32G431CBT6 (U5) with an 8 MHz crystal (Y1), running AM32. Max expected unloaded ERPM 300 k, min cycle period 200 µs. BOOT0 is not routed, so flashing is over the DSHOT wire (or SWD).
Two green rail indicators (LED1 ~0.49 mA off 12 V, LED2 ~0.45 mA off 3.3 V) and one blue (LED3 ~0.51 mA), and an ST STDC14 SWD connector (J1); a jumper selects an external 5 V. LED currents are as annotated on the schematic.
Interactive PCB — click any pad, trace or zone to highlight its whole net; hover for pad and live part data.
Interactive schematic — hover a symbol for its KiCad highlight plus live MPN / stock / price / LCSC.