0402N330J500CT

Summary

every figure cited to the datasheet below

0402 (1005 metric) multilayer ceramic chip capacitor — 1.00 × 0.50 × 0.50 mm body (±0.05 mm, thickness code N), 0.25 mm termination bands; reflow soldering only^p.3
33 pF ±5% (code 330 J), rated 50 VDC — NP0 (C0G) Class I dielectric, code N; listed in the NP0 capacitance-range grid at 0402 / 50 V^{p.2, p.5}
NP0 (C0G) stability: capacitance within ±30 ppm/°C across the full −55 to +125 °C operating range^{p.4, p.14}
Q factor ≥1,000, measured at 1 MHz / 1.0 Vrms (values ≤1,000 pF are measured at 1 MHz)^{p.4, p.12}
Insulation resistance 10 GΩ or R×C ≥ 500 Ω·F, whichever is smaller, at rated voltage^p.14
Dielectric strength: withstands 250% of rated voltage for 1–5 s with no damage or flashover^p.13
High-temperature load life: 1,000 h at 125 °C and 200% of rated voltage; capacitance change within ±3% or 0.3 pF^p.18
CaZrO₃-based ceramic, Ni inner electrodes, Cu/Ni/Sn termination (code C, pure-Sn outer plating)^{p.2, p.20}
Paper carrier tape, 8 mm wide / 2 mm pocket pitch — 10,000 pcs per 7-inch (φ178 mm) reel, code T; store at 5–40 °C / 20–70% RH, MSL 1^{p.11, p.19, p.20}