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ZTP7193Y

Public Made by Adom

by adom

ZILLTEK DC-DC Converters, TSOT-23-6L. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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ZTP7193Y

ZILLTEK · DC-DC Converters · TSOT-23-6L

ZTP7193Y from ZILLTEK, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT power_in High-side gate drive boost input. Connect a 0.1μF (or greater) bootstrap capacitor from SW to BOOT to power the internal high-side N-channel MOSFET. Charged from the internal 5V rail when SW is low.
2 GND power_in Device ground. Return for the internal control circuitry and the low-side MOSFET. Should be tied to a large copper area for thermal dissipation.
3 FB input Feedback input. Senses the output voltage via an external resistive divider to regulate VOUT. Internal reference threshold is 0.6V; over-voltage comparator trips at 0.72V (20% above nominal).
4 EN input Enable input (digital). Drive high (≥1.22V rising) to enable the regulator, low (≤1.12V falling) to shut it down (3μA typical shutdown current). Pull up to VIN via 100kΩ for automatic startup. Do not float; absolute max 6V.
5 IN power_in Power input, 4.5V to 18V. Supplies the IC and the internal step-down switches. Bypass to GND with a low-ESR ceramic capacitor (e.g. 10μF/25V X5R/X7R) placed close to the pin.
6 SW power_out Power switching output (LX node). Connects to the external inductor and the bootstrap capacitor return. Swings from GND to ~VIN at 500kHz; route away from sensitive analog nodes such as FB.

Key specifications

Parameter Value
Manufacturer ZILLTEK
Package TSOT-23-6L
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • ZTP7193Y

CAD (KiCad official)

  • Symbol: ZTP7193Y
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: TSOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: ztp7193y-etched.step / ztp7193y-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ztp7193y.step / ztp7193y.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZILLTEK datasheet (8 pp, sha256 179ced754e60cb8c, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF