ZD25WD20CTIGT from Zetta, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input, active low. Drives the device out of standby and enables the SPI interface; must be held high to deselect the device. Command bytes are latched relative to the CS# falling edge.
2	SO/IO1	bidirectional	Serial Data Output in Standard SPI mode (data shifted out on the falling edge of SCLK). Becomes bidirectional data line IO1 during Dual Output Fast Read (3BH) and Dual I/O Fast Read (BBH) commands.
3	NC	unconnected	No internal connection. Leave floating or tie to ground per system convention.
4	VSS	power_in	Ground reference for the device. Connect to the system 0 V rail with a low-impedance path.
5	SI/IO0	bidirectional	Serial Data Input in Standard SPI mode (data latched on the rising edge of SCLK, MSB first). Becomes bidirectional data line IO0 during Dual Output Fast Read (3BH) and Dual I/O Fast Read (BBH) commands.
6	SCLK	input	Serial Clock input. Provides the timing for serial input and output; supports SPI modes 0 and 3. Maximum clock of 104 MHz for Fast Read commands.
7	NC	unconnected	No internal connection. Leave floating or tie to ground per system convention.
8	VCC	power_in	Device power supply, 1.65 V to 3.6 V. Decouple locally with a 100 nF ceramic capacitor to VSS placed close to the pin.

Key specifications

Parameter	Value
Manufacturer	Zetta
Package	SOP-8
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

ZD25WD20CTIGT
ZD25WD20CTIGR
ZD25WD20CTIGY
ZD25WD20CTIGTCTEGT
ZD25WD20CTIGTCTEGR
ZD25WD20CTIGTCTEGY
ZD25WD20CTIGTCO*
ZD25WD20CTIGTCE*
ZD25WD20CTIGTCK*
ZD25WD20CTIGTCJ*
ZD25WD20CTIGTCF*

CAD (KiCad official)

Symbol: ZD25WD20CTIGT
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`zd25wd20ctigt.step`	122 KB	You want the bare part, or you mark your own boards.
`zd25wd20ctigt-etched.step`	2.4 MB	You want the part with `ZD25WD20CTIGT` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 590 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Zetta datasheet (40 pp, sha256 1380bd530052524e, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF