component
ZD24C256A-SSGMT
Public Unreviewedby Ray
Zetta EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownZD24C256A-SSGMT
Zetta · EEPROM · SOIC-8
ZD24C256A-SSGMT from Zetta, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input bit 0. Hardwire to VCC or GND to form the least-significant bit of the 7-bit I2C slave address (device type identifier '1010' concatenated with A2/A1/A0). Allows up to eight ZD24C256A devices on one bus. Schmitt-triggered CMOS input. |
| 2 | A1 | input | Device address input bit 1. Hardwire to VCC or GND to form the middle bit of the hardware slave address field. Schmitt-triggered CMOS input. |
| 3 | A2 | input | Device address input bit 2. Hardwire to VCC or GND to form the most-significant bit of the hardware slave address field. Schmitt-triggered CMOS input. |
| 4 | GND | power_in | Ground reference for the power supply. Tie to system ground. |
| 5 | SDA | bidirectional | I2C serial data. Open-drain bidirectional line used to transfer address and data. Requires an external pull-up resistor (<=10 kOhm recommended) and may be wire-ORed with other open-drain devices on the same bus. Schmitt-triggered input. |
| 6 | SCL | input | I2C serial clock input from the bus master. Data on SDA is latched on the rising edge of SCL and driven out on the falling edge. Must be pulled high with an external resistor when the bus is idle. Schmitt-triggered input. |
| 7 | WP | input | Write Protect. Tie to GND for normal (unprotected) write operation; tie to VCC to inhibit all writes to the memory array (hardware data protection). Active high. If left floating, an internal weak pull-down biases the pin toward GND but Zetta recommends driving it to a known state. |
| 8 | VCC | power_in | Device power supply, 1.7 V to 5.5 V (1 MHz Fast Mode Plus operation requires >=2.5 V). Bypass locally to GND. Operating outside this range may produce spurious results. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Zetta |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
ZD24C256A-SSGMTZD24C256A-SSGMBZD24C256A-SSGMTXGMTZD24C256A-SSGMTXGMBZD24C256A-SSGMTMAGMTZD24C256A-SSGMTMAGMBZD24C256A-SSGMTPGMTZD24C256A-SSGMTPGMBZD24C256A-SSGMTSTGMTZD24C256A-SSGMTSTGMBZD24C256A-SSGMTCGMTZD24C256A-SSGMTCGMBZD24C256A-SSGMTU1GMTZD24C256A-SSGMTU1GMBZD24C256A-SSGMTUGMTZD24C256A-SSGMTUGMB
CAD (KiCad official)
- Symbol:
ZD24C256A-SSGMT - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
zd24c256a-ssgmt.step |
122 KB | You want the bare part, or you mark your own boards. |
zd24c256a-ssgmt-etched.step |
2.9 MB | You want the part with ZD24C256A-SSGMT already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 698 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Zetta datasheet (26 pp, sha256
18ebc71abd08daef, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).