component
ZD24C08A-SSGMT
Public Unreviewedby Ray
Zetta EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownZD24C08A-SSGMT
Zetta · EEPROM · SOP-8
ZD24C08A-SSGMT from Zetta, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A2 | input | Device address input bit A2. Tied to VCC or GND to select the hardware slave address (only A2 is used on the 8K variant; A1/A0 are ignored/NC). Internally pulled down to GND when floating; Zetta recommends driving it to a known state. |
| 2 | A1 | input | Device address input bit A1. On the 8K (ZD24C08A) variant this pin is a Not-Connect because the corresponding address bit is used internally for memory-page selection (P0). Can be left floating or tied to GND/VCC. |
| 3 | A0 | input | Device address input bit A0. On the 8K (ZD24C08A) variant this pin is a Not-Connect because the corresponding address bit is used internally for memory-page selection (P1). Can be left floating or tied to GND/VCC. |
| 4 | GND | power_in | Ground reference for the device. Connect to system ground. |
| 5 | SDA | bidirectional | Serial Data. Open-drain bidirectional data line for the I2C-compatible 2-wire bus. Must be pulled high with an external resistor not exceeding 10 kΩ; may be wire-ORed with other open-drain/open-collector devices on the same bus. |
| 6 | SCL | input | Serial Clock input. Supplies the clock for the I2C-compatible 2-wire interface: data on SDA is latched on the rising edge and driven out on the falling edge. Must be held high when the bus is idle (external pull-up or forced high). Max clock 1 MHz. |
| 7 | WP | input | Write Protect (active-high). When tied to VCC, all write operations to the array are inhibited (full-array protection); when tied to GND, normal read/write is allowed. Internally pulled down to GND when floating; Zetta recommends driving it to a defined state. |
| 8 | VCC | power_in | Device power-supply input. Provides the source voltage for the EEPROM; operation at invalid VCC voltages may produce spurious results. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Zetta |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
ZD24C08A-SSGMT
CAD (KiCad official)
- Symbol:
ZD24C08A-SSGMT - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
zd24c08a-ssgmt.step |
122 KB | You want the bare part, or you mark your own boards. |
zd24c08a-ssgmt-etched.step |
2.8 MB | You want the part with ZD24C08A-SSGMT already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 676 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Zetta datasheet (22 pp, sha256
b348afafa94d42a8, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).